RESEARCHÂ
Research Interests
Hardware Optimization of Deep Neural Network (DNN) accelerators
ASIC & SoC : Design and implementation
Digital circuits for AI
MAC Design, optimization and implementation for DNNs
Publications
Trivedi, Vasundhara, Khushbu Lalwani, Gopal Raut, Avikshit Khomane, Neha Ashar, and Santosh Kumar Vishvakarma. "Hybrid ADDer: A Viable Solution for Efficient Design of MAC in DNNs." Circuits, Systems, and Signal Processing (2023): 1-19.[PDF]
Upadhyay, Raksha, Shubham Singh, Vasundhara Trivedi, and Ankit Soni. "Randomness test for wireless physical layer key generation." In 2018 International Conference on Advanced Computation and Telecommunication (ICACAT), pp. 1-6. IEEE, 2018.[PDF]
Ashar, Neha, Gopal Raut, Vasundhara Trivedi, Santosh Kumar Vishvakarma, and Akash Kumar. "QuantMAC: Enhancing Hardware Performance in DNNs With Quantize Enabled Multiply-Accumulate Unit." IEEE Access 12 (2024): 43600-43614. [PDF]