RESEARCH 

Research Interests

• Hardware Optimization of Deep Neural Network (DNN) accelerators

• ASIC & SoC : Design and implementation

• Digital circuits for AI

• MAC Design, optimization and implementation for DNNs

Publications

1. Vasundhara Trivedi and Santosh Kumar Vishvakarma,” ACSAM: Accuracy-configurable Segmentation-based Approximate Multiplier for Error-resilient Edge-AI Applications”, IEEE Embedded Systems Letters, 2026, D.O.I.: 10.1109/LES.2026.3676574. (I.F.: 2.0)

2. Vasundhara Trivedi, Harman Singh Bagga, Gopal Raut, Santosh Kumar Vishvakarma,” Adaptive-Precision SIMD Architecture for High-Throughput and Resource-Efficient DNN Acceleration”, Integration, the VLSI Journal, Elsevier, p.102666, 2026. (I.F.: 2.5)

3. Vasundhara Trivedi, Gopal Raut, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar,” C-SIMD: CORDIC-Driven SIMD Processing Element for Resource-Efficient Multi-Precision Deep Learning Inference” IEEE Access, 2026. DOI: 10.1109/ACCESS.2026.3653253. (I.F.: 3.6)

4. Trivedi, Vasundhara, Khushbu Lalwani, Gopal Raut, Avikshit Khomane, Neha Ashar, and Santosh Kumar Vishvakarma. "Hybrid ADDer: A Viable Solution for Efficient Design of MAC in DNNs." Circuits, Systems, and Signal Processing (2023): 1-19.[PDF]

5. Vasundhara Trivedi and Santosh Kumar Vishvakarma, ”Design of Operand-rounding based Approximate Multiplier for Error-resilient Applications”, 29th VLSI Design and Test Conference, Chandigarh, India, Aug. 7-9, 2025 (Accepted and In Press)

6. Ashar, Neha, Gopal Raut, Vasundhara Trivedi, Santosh Kumar Vishvakarma, and Akash Kumar. "QuantMAC: Enhancing Hardware Performance in DNNs With Quantise-Enabled Multiply-Accumulate Unit." IEEE Access 12 (2024): 43600-43614. [PDF]

7. Upadhyay, Raksha, Shubham Singh, Vasundhara Trivedi, and Ankit Soni. "Randomness test for wireless physical layer key generation." 2018 International Conference on Advanced Computation and Telecommunication (ICACAT), pp. 1-6. IEEE, 2018.[PDF]