Dr. Gopal R Raut

Knowledge Associate (Senior Project Engineer)

Center for Development of Advanced Computing 

(C-DAC) Bangalore

Ministry of Electronics and Information Technology

Govt. of India

Research Interest

• Digital Circuit Design: FPGA implementation/ASICs for Edge-AI, HW-SW co-design, RISC-V integration, and 2D systolic array for DNN.

• Arithmetic Module Design: Efficient MAC units with CORDIC architecture, Bfloat16 and targeted arithmetic schemes, DNN Accelerator and hardware interface ex. AXI

• Software-Hardware Validation: Python-based validation of hardware performance, DMA controller for DNN accelerators.

• VLSI Design: In-Memory Computing using SRAM, CMOS circuit design for mixed-signal applications, layout design and Chip tape-out