Sujay Deb is an Associate Professor in Electronics and Communication Engineering at Indraprastha Institute of Information Technology, Delhi (IIIT-D). He received PhD from the School of Electrical Engineering and Computer Science, Washington State University, Pullman, WA on May 2012. Before his current position, he worked as an intern at Intel Labs, Hillsboro, OR.
His major awards and achievements include DST INSPIRE Faculty award in 2012; Outstanding PhD student award in Computer Engineering, WSU, 2011; Winner of India-US Grand Challenge Initiative for Affordable Blood Pressure measurement technologies in 2014. He is a senior member of IEEE.
Research Interest: His research Interests are broadly in the areas of power and performance efficient and reliable Network-on-Chip (NoC) communication fabrics, Heterogeneous System Architectures (HSA), hardware for deep learning, low cost bio-sensors for preventive healthcare. More specifically, topics of interest include: intra and inter-chip wireless interconnection, efficient and reliable routing schemes, scalable coherence protocols for many-core systems, hardware support for on-chip broadcast and multi-cast traffic, cache architectures for HSA, single chip bio potential acquisition system for preventive health-care. He also works on application of technology to healthcare, hardware security, mobile sensing etc.
Sidhartha Sankar Rout
Sidhartha Sankar Rout is a Ph.D. research scholar in the Department of Electronics and Communication Engineering at Indraprashtha Institute of Information Technology Delhi (IIIT Delhi). He is working under the supervision of Dr. Sujay Deb in the Advanced Multicore Systems Lab (AMS Lab). He has completed his M.Tech in VLSI Design and Embedded Systems from IIIT Delhi in the year 2014. His research interest includes system validation and hardware security. He also works on efficient communication Infrastructure design such as Network-on-Chip for Multi-core systems. His PhD research work has won Best Popular Science Stories (PhD Category) award by DST AWSAR 2019, ACM SIGDA Best Student Research Forum Award at ASP-DAC 2021, and First Prize in Student Research Forum award at VLSID 2021. He has a total of 6 years of combined Industry and Teaching experience before joining the PhD.
Mitali Sinha
Mitali Sinha is a Ph.D. research scholar in the Department of Computer Science and Engineering at Indraprastha Institute of Information Technology Delhi (IIIT Delhi). She is working in Advanced Multicore Systems Lab (AMS Lab) under the supervision of Dr. Sujay Deb. She has completed her M.Tech in Computer Science and Engineering from NIT Agartala in 2016 and holds a gold-medal at her Bachelor's and Master's degree programme. Her research interests include heterogeneous systems architectures and hardware security. She is currently focusing on design space optimization and security analysis of accelerator-rich heterogeneous system-on-chips. Prior to joining IIITD as a Ph.D. scholar, she has worked as a Lecturer in TIT Agartala and as a research associate at IIITD.
Sneha Agarwal
Sneha Agarwal is a first year PhD research scholar in Advanced Multicore Systems Lab (AMS Lab) at IIITD. She completed her B.Tech in Electronics and Communications in the year 2020 and has been working here since.
She is currently exploring various domains in the broad spectrum of computer architecture. Her current projects include TROJAN detection on a NOC based System on Chip and Signal selection methodologies in case of Post-Si validation. She has also been actively researching on opensource VLSI design solutions, different tools available with respect to the same, their advantages, complexity and constraints.
Deepank
Deepank joined has PhD research scholar at Advanced Multicore Systems Lab (AMS Lab) at IIITD in 2021. He graduated from Delhi Technological University in Electronics and Communication in 2019 and joined Synopsys.
He has experience in Embedded Memory design and currently exploring computer architecture domain. He has worked on Cortex M0 and made few basic applications on FPGA. Currently exploring some other openware processors like Amber Core. His current research interests are Memory design & SoC design.
Tarun Sharma
Tarun is a PhD scholar at in Advanced Multicore Systems Lab (AMS Lab) at IIIT-D. He completed his M.E. in Microelectronics at the Birla Institute of Technology and Science Pilani-Hyderabad Campus. He received his bachelors in Electrical and Electronics Engineering from Guru Tegh Bahadur Institute of Technology.
His research areas include approximation for interconnects and heterogenous system architecture. He earlier worked on a project titled "Challenges and Trends in SoC Design and Verification". Prior to joining as a PhD scholar, he also worked as Technical Graduate Intern at Cisco Systems, Bangalore.
Keshav Goel
Keshav is a PhD student at Advanced Multicore Systams Lab (AMS Lab) at IIIT-D. He joined the lab in May 2021 as a research assistant and later enrolled in PhD in Aug 2022.
He is working on Optimizing the run-time of spatio-temporal traffic flow in Network-On-Chip using Dynamical systems theory. His research interest involves discovering and modeling the behavior of Networked Dynamical Systems. He also aims for information-theoretic approaches to identify and control the behavior of Networked Dynamical Systems. His quest for understanding fractals led him into dynamical systems. And, his understanding of Network on Chip architecture stems from the literature review and his work on a two-year-long DRDO-sponsored project. The project involved designing ARM and Amber microprocessor-based System-On-Chip and prototyping them onto Xilinx FPGAs.
Naorem Akshaykumar
Naorem Akshaykumar has recently joined as Ph. D. Scholar at Advanced Multicore Systems Lab (AMS Lab) at IIITD. Akshaykumar received his B.E. degree in Electronics and Communication engineering from NIE Mysore and done his M. Tech degree from NIT Manipur in Electronics and Communication Engineering (VLSI and Embedded system).
He is currently exploring various domains of computer architecture. His current research interests are SoC design and heterogeneous systems architectures.