semiconductor physics and Devices
Second Semester Lecture Course
Sheng Yun Wu
Second Semester Lecture Course
Sheng Yun Wu
Week 9: Semiconductor Fabrication – Growth, Doping, and Lithography
Lecture Topics:
Introduction to Semiconductor Fabrication
Semiconductor fabrication involves the processes of creating integrated circuits (ICs) on semiconductor wafers.
Overview of the key steps:
Wafer preparation
Doping
Photolithography
Etching
Deposition
Packaging
The importance of precision and cleanroom environments in semiconductor manufacturing to avoid contamination.
Wafer Fabrication and Growth of Semiconductor Crystals
Czochralski Process:
The most common method for growing single-crystal silicon.
A small seed crystal is dipped into molten silicon, and as it is slowly pulled and rotated, a large cylindrical silicon ingot is formed.
Ingot slicing: The ingot is sliced into thin wafers, which are polished to create a smooth surface.
Molecular Beam Epitaxy (MBE) and Chemical Vapor Deposition (CVD):
Used for the growth of compound semiconductors like gallium arsenide (GaAs).
MBE allows for atomic layer precision, while CVD is faster and used for large-scale deposition.
Doping Techniques
Doping is the process of introducing impurities into the semiconductor to control its electrical properties.
Two primary doping methods:
Diffusion: Doping atoms are diffused into the surface of the semiconductor at high temperatures.
Ion Implantation: Doping atoms are accelerated and implanted into the semiconductor surface using a high-energy beam.
Comparison of diffusion and ion implantation:
Diffusion is simpler but lacks precision in controlling doping depth.
Ion implantation provides better control over doping concentration and depth but requires annealing to repair crystal damage.
Annealing: Heating the wafer after doping to repair lattice damage and activate dopants.
Photolithography
Photolithography is the process used to transfer a pattern onto the surface of the semiconductor wafer.
Key steps in photolithography:
Photoresist application: A light-sensitive material is applied to the wafer.
Exposure: Ultraviolet (UV) light passes through a photomask, transferring the pattern onto the wafer by exposing certain areas of the photoresist.
Development: The exposed areas of the photoresist are dissolved away, revealing the underlying semiconductor surface.
Photomask: A patterned template that defines the areas of the wafer to be exposed to light.
Types of photoresist:
Positive photoresist: The exposed regions become soluble and are washed away.
Negative photoresist: The exposed regions harden and remain after development.
Etching and Deposition Techniques
Etching: The process of removing material from the wafer to create the desired structure.
Wet etching: Uses chemicals to dissolve unwanted material. It is isotropic (etches equally in all directions).
Dry etching: Uses plasma or reactive ions to remove material. It is anisotropic (etches in a specific direction), allowing for more precise patterns.
Deposition: Adding layers of material to the wafer, such as oxides, metals, or nitrides, for insulating, conductive, or protective purposes.
Physical Vapor Deposition (PVD): A vacuum process where material is vaporized and deposited onto the wafer.
Chemical Vapor Deposition (CVD): A chemical reaction in a gas phase leads to the deposition of material on the wafer.
Chemical Mechanical Planarization (CMP)
CMP: A process used to smooth and flatten the wafer surface after deposition or etching.
CMP is essential for achieving uniform thickness and preparing the wafer for further photolithography steps.
Packaging and Testing
Die separation: After all the fabrication steps are complete, the individual chips (dies) are separated from the wafer.
Packaging: The dies are encapsulated in protective material and connected to external leads for use in electronic devices.
Testing: Each chip is tested for functionality and performance before being packaged and sent for use in electronics.
Moore’s Law and Scaling Challenges
Moore’s Law: The observation that the number of transistors on a chip doubles approximately every two years, leading to increasing performance and decreasing cost per transistor.
Challenges in scaling:
As feature sizes approach the nanometer scale, quantum effects and heat dissipation become major challenges.
New materials and fabrication techniques, such as extreme ultraviolet (EUV) lithography, are being developed to continue scaling.
Examples:
Calculation of the doping concentration in a semiconductor after diffusion or ion implantation for a given dopant dose.
Explanation of the steps involved in photolithography for a simple pattern transfer.
Comparison of wet and dry etching techniques and when to use each.
Homework/Exercises:
Describe the Czochralski process for growing silicon crystals and explain how the resulting ingots are prepared for wafer fabrication.
Calculate the h for a given ion implantation energy and describe the annealing process required afterward.
Design a photolithography process to create a specific pattern on a silicon wafer, explaining the role of photoresist and the photomask.
Compare and contrast the wet etching and dry etching processes in terms of precision and applications in semiconductor fabrication.
Suggested Reading:
Charles Kittel, Introduction to Solid State Physics, Chapter 8: Semiconductors (continued).
Key Takeaways:
Semiconductor fabrication involves precise control over materials and processes to create integrated circuits.
Key steps in fabrication include crystal growth, doping, photolithography, etching, and deposition.
Photolithography is essential for patterning wafers while doping determines the electrical properties of the semiconductor.
As semiconductor technology advances, challenges such as quantum effects and heat dissipation require new techniques and materials.
This week covers the fundamentals of semiconductor fabrication, focusing on the processes involved in growing, doping, and patterning semiconductor wafers. Understanding these techniques is essential for students working in the fields of microelectronics and nanotechnology.