Changsik Yoo
Ph.D. Professor, Dept. Semiconductor Convergence Engineering
Sungkyunkwan University (SKKU), Korea
Phone; +82 31 290 7117, E-mail; changsik.yoo@skku.edu
Webzine of SKKU (반도체의 균형점을 설계하는 연구자)
Education
Ph.D. Seoul National University, Korea
M.S. Seoul National University, Korea
B.S. (Highest Honor) Seoul National University, Korea
Experiences
Executive VP, Samsung Electronics, 2020-2025
Professor of Electronic Engineering, Hanyang University, Seoul, Korea, 2002-2020
Visiting Researcher, Samsung Electronics, 2019-2020
Visiting Professor, Swiss Federal Institute of Technology (EPFL, Lausanne), 2018
Technical Advisor, DB HiTek, Seoul, Korea, 2017
Co-Founder & CTO, SmartPHY Inc. Seoul, Korea, 2010-2015
Senior Engineer, Silicon Image Inc. California, USA, 2008-2009
Senior Engineer, Samsung Electronics, Korea, 1998-2002
Research Staff, Swiss Federal Institute of Technology (ETH, Zurich), 1998-1999
Associate Editor, IEEE Microwave and Wireless Components Letters
Technical Program Committee, IEEE International Solid-State Circuits Conference (ISSCC)
Technical Program Committee, IEEE VLSI Circuits Symposium (SOVC)
Technical Program Committee, IEEE European Solid-State Circuits Conference (ESSCIRC)
President, IEIE RF and Analog Circuit Research Group
Lectures and Talks
DRAM Circuit Design, Seoul National University & SKKU, Mar. 2026
DRAM I/O for AI Computing, IEIE High-Speed Interface Workshop, Apr. 2026
DRAM for AI System, KAIST, May, 2026 & Smart Semiconductor Academy, Aug. 2026