Embedded Files
PhD Students
Sanjay Singh received the Master of Technology (M.Tech) degree in VLSI Design from the National Institute of Technology (NIT), Kurukshetra, India, during 2017-2019. He earned his Bachelor of Technology (B.Tech) degree in Electronics and Communication Engineering from I.E.T Faizabad, Uttar Pradesh, India, in 2011-2015. Sanjay Singh is pursuing his Ph.D. from Madan Mohan Malaviya University of Technology, Gorakhpur, with a research focus on radiation-hardened circuit design. He is also currently a Senior Design Engineer at ON Semiconductor India Pvt Ltd since October 2022, after having worked as an Analog Circuit Design Engineer at Synopsys India Pvt Ltd from September 2019 to October 2022.
Kuldeep Kannaujiya received the B.Tech degree in Electronics and Communication Engineering in 2019, and M.Tech in VLSI Design in 2021, focusing on Solar Cell Design. He also completed a Work-Based Learning Program in VLSI Design using Cadence Tools at the National Institute of Electronics & Information Technology (NIELIT), Gorakhpur. Additionally, he contributed to the C2S Project (MeitY), specializing in SRAM cell-based low-power memory design. Currently, he is pursuing a Ph.D. at Madan Mohan Malaviya University of Technology (MMMUT), Gorakhpur, with research focused on VLSI Digital Circuit Design.
Prashant Pandey received the B.Tech degree in Electronics Engineering from Rajkiya Engineering College, Sonbhadra (AKTU), India, in 2023, with a CGPA of 7.85. He also holds a diploma in Electronics Engineering from Government Polytechnic, Kanpur (BTEUP). His research interests include semiconductor technology, embedded systems, and VLSI design.
Kanchan Lata Srivastava holds a Bachelor of Technology (B.Tech) degree in Electronics and Communication Engineering from Deen Dayal Upadhyaya Gorakhpur University (DDUGU), where she graduated as the Gold Medalist of the 2025 batch. Her research focuses on Low Power Memory Design, TFET for Analog and RF Applications.
Saurabh Yadav currently working on the C2S research project. Ha has completed his M.E. in Electronics and Communication Engineering from NITTTR Chandigarh, securing a CGPA of 8.06, with a thesis titled “Design and Analysis of GAA Nanowire for Low Power Applications and Bachelor of Technology (B.Tech) in Electronics and Communication Engineering from GLA University, Mathura. His research area includes VLSI Design, Low Power Devices, and Nanotechnology, in which he has also worked on a research project at IIT Roorkee under the scheme entitled “Development of 1.8V/5V/10V/20V I/O Pads in SCL’s 0.18μ CMOS process” sponsored by ISRO, Bengaluru.
Page updated
Report abuse