Three (3) - National Level Technical Symposium – Prevoyance-2007, Prevoyance-2008, Prevoyance-2009.
GUJCOST Sponsored Five day National Workshop on “VLSI Design and Testing”, during 4-8 Nov 2019.
Two day National Workshop (under CCE) on “Back End VLSI Design”, during 6-7 April 2018.
Two day National Workshop (under CCE) on “Back End VLSI Design”, during 5-6 April 2019.
Three-day workshop on “Analog, Digital, and Microprocessor/Microcontroller Laboratory” for the Laboratory assistant of EC-EE-IC Department, on 16, 17, 19 June 2017.
Workshop on “ARM Architecture” under ECO, 20 May 2009 & One-day Workshop, “Simply TI”, 19 May 2009.
Co-coordinator - Research Methodology, Ph.D. Students.
Co-coordinator – Orientation Program, M. Tech First Year.
Faculty Induction Programme
Induction Training (Staff Development Programme)
Industrial Training at
Si-bridge Technology
Refresher Course
Ph. D. Orientation Programme
Research Orientation Programme (ROP)
Introduction to Internet of Things (IoT)
Python and Emerging Trends in Machine Learning
LAMP- (Linux, Apache server, MySQL, Php Language)
Overview of VLSI design and Technology
Advanced Device drivers and DSP Programming
Advances in Digital VLSI Design
Embedded System Design
Advances in Electronics and Communication Engineering
Advances in Electronics and Communication Engineering
Multimedia Signal Processing Theory and Applications
Recent Trends in Communication Engineering,
VLSI Design and Embedded System
Signal Processing and Artificial Intelligence
Innovative and Effective Pedagogic practices
VLSI Chip Design Hands on using Open Source EDA
LINUX Workshop
Advanced EDA Tools for VLSI Testing
Low Power VLSI Design
Scilab Workshop
COMSOL Multiphysics
Scientific Temperament Development
Gender Sensitization
Classroom Assessment Technique
Discovering your Innovative Self
Virtual Instrumentation and its application,
Cadence VLSI Tool
Blended Course Design Modules for Collaborative Learning & New ways of learning and teaching using different forms of technologies
Preparation of Vision and Mission Statement
INDUSTRY ACADEMIA Meet
‘Moodle’ and ‘Writing Research Paper and Ph. D Thesis,
National Seminar on NANOTECHNOLOGY
National Seminar on Advances in VLSI Design
NextGen Universities: Roadmap for Higher Education in India
Essentials of Patent Drafting
International Conclave on Higher Education 2016
Technical Committee Member (Design Lab) – Govt. of Gujrat (DST, GUJCOST)
Research Project Evaluation Committee Member - ‘Promoting Innovations in Individuals, Start-ups and MSMEs (PRISM), DSIR
Research Project Evaluation Committee Member - GSBTM Altera University Program – Received Donation of Quartus II Subscription edition (25 floating license – Approx. cost of 5 lakhs)
REVIEWER – JOURNALS/CONFERENCES:
Microelectronics (MEJ), Elsevier
Analog Integrated Circuits and Signal Processing (ALGO)- Springer
Circuits, Systems and Signal Processing (CCSP) – Springer
Nirma University international Conference - NUiCONE 2015, 2017
VLSI Design and Test Symposium – VDAT 2015
Digital System Design and STA concept, Special Lecture Series Arranged for Interview Preparation of M.Tech EC Semester II, Feb 06, 2020.
Process Variation, Corner Analysis, and Monte Carlo Simulations, GUJCOST Sponsored Five Day Workshop on “VLSI Design & Testing” Nov 4 – 8, 2019.
Introduction to VLSI Design Tools, Two Day Workshop on “Back End VLSI Design” April 5 – 6, 2019, CCE, NU
Layout design and Simulation using Cadence Tools, (6/4/19), Two Day Workshop on “Back End VLSI Design” April 5 – 6, 2019, CCE, NU
Process Variation, Corner Analysis, and Monte Carlo Simulations, (6/4/19), Two Day Workshop on “Back End VLSI Design” April 5 – 6, 2019, CCE, NU
Introduction to VLSI Design Tools (from Schematic to GDS), (6/4/18), Two Day Workshop on “Back End VLSI Design” April 6 – 7, 2018, CCE, NU.
Process Variation, Corner Analysis and Monte Carlo Simulations, (7/4/18), Two Day Workshop on “Back End VLSI Design” April 6 – 7, 2018, CCE, NU.
Interfacing hardware using Python, (22/3/17), One Week Workshop on Python for Engineers for Scientist of ISRO, EC&CSE, IT, NU
Micro-Python and Node-MCU, (22/3/2017), One Week Workshop on Python for Engineers for Scientist of ISRO, EC&CSE, IT, NU
Single Board Computing and Python, (25/05/17), Faculty Development Program on Embedded Systems Design, EC Dept & CCE, IT, NU Protocol Analyzer and Logic Analyzer, Multimedia Signal Processing Theory and Applications, (9/7/2014), STTP, EC & ADR Cell, NU
Digital System Design, Advances in Electronics and Communication Engineering, (July 2013), STTP, EC Dept & ADR Cell, NU
Embedded System Design using FPGA, Advances in Electronics and Communication Engineering, (4/7/2013), STTP, EC Dept & ADR Cell, NU
VLSI Design Flow using FPGA, Advances in Electronics and Communication Engineering, (11/7/2012), STTP, EC Dept & ADR Cell, NU
DSP Algorithms implementation on FPGA, Training Programme for ISRO Scientist on Advanced DSP & Comm. Engg.,- Hands-on MATLAB, (21/12/2012), EC Dept, IT, NU
Lectures in Orientation/Practical Training:
LateX - Tool
Digital System Design and STA (Special Session for Interview – 04/02/2020)
EDA Tools (Cadence) (2018) – Practical Training
VLSI EDA Tools (Cadence) (2017) – Practical Training
Protocol Analyzer (2016, 2015, 2014) – Practical Training
Introduction to Latex (2017, 2016, 2015, 2014)
Scilab (22/7/2014), M. Tech in VLSI Design
VHDL & FPGA (24/7/2014), M. Tech in Embedded System
Scilab (02/7/2013), M. Tech in VLSI Design
Fundamentals of Digital System Design (17/7/2012, 24/7/2012)