Patents
Z. Abuhamdeh, N. Mohan, V. Kandadi, T. Xanthopoulos, T. Albarran, P. Rickenbach, "System and method for performing a failure assessment of an integrated circuit", US Patent 11669419, June 6, 2023.
N. Mohan, V. Kandadi, T. Xanthopoulos, "Traversing a variable delay line in a deterministic number of clock cycles", US Patent 11545987, January 3, 2023.
T. Xanthopoulos, N. Mohan, "DLL-based clocking architecture with programmable delay at phase detector inputs", US Patent 11545981, January 3, 2023.
N. Mohan, T. Xanthopoulos, "Droop detection and mitigation", US Patent 11402413, August 2, 2022.
T. Xanthopoulos, N. Mohan, "Clocking architecture for DVFS with low-frequency DLL locking", US Patent 10784871, September 22, 2020.
N. Mohan, G. Faldamis, T. Xanthopoulos, "Glitch-free PLL Multiplexer", US Patent 10530370, January 7, 2020.
N. Mohan, I. Pragaspathy, "High performance shifter circuit," US Patent 9904511, February 27, 2018.
N. Mohan, V. Kandadi, "Method to measure edge-rate timing penalty of digital integrated circuits," US Patent 9740807, August 22, 2017.
E. Beckman, N. Mohan, "Adder decoder," US Patent 9645790, May 9, 2017.
S. Balasubramanian, N. Mohan, M. Salvi, "Multiplexer flop," US Patent 9130549, September 8, 2015.
A. Nathan, N. Mohan, K. S. Karim, A. Kumar, K. Sakariya,"Integrated multiplexer/de-multiplexer for active-matrix display/imaging arrays," US Patent 7573452, August 11, 2009.