Education
Education
2015 - 2018: Washington University, St. Louis, MO
PhD, Computer Science and Engineering
2012 - 2015: Michigan State University, East Lansing, MI
PhD student, Electrical and Computer Engineering
2006 - 2010: Tsinghua University, Beijing, China
B.S., Physics Science
Experience
Experience
IC Design Engineer, Analog Devices Inc. 2018~present
IC Design Engineer, Analog Devices Inc. 2018~present
- DC-DC buck converters design for industrial and automotive applications.
Assistant to Instructor, Washington University in St. Louis 2017 Fall
Assistant to Instructor, Washington University in St. Louis 2017 Fall
- Assist instructor for course CSE417T( Introduction to Machine Learning), including grading, office hours, and conducting review sessions.
Graduate Assistant, Washington University in St. Louis 2015~2018
Graduate Assistant, Washington University in St. Louis 2015~2018
- Designed and implemented Piezoelectricity-driven Floating-Gate (PFG) sensors on 0.5 um CMOS process with as low as 5 nW power consumption which is 10 times lower than conventional PFG sensors.
- Proposed and designed low-power circuits for time-stamped sensing systems.
- Proposed and Designed dynamic authentication of passive IoTs using self-powered timing device
Power Optimization Intern, HP LABS 2016.8~2016.12
Power Optimization Intern, HP LABS 2016.8~2016.12
- Designed and conducted software/hardware power measurement and optimization techniques for next-generation mobile platforms.
Graduate Assistantļ¼Michigan State University 2012~2015
Graduate Assistantļ¼Michigan State University 2012~2015
- Designed and fabricated a long-term self-powered timer with over 10 years timing period on both 0.5 um and 180 nm CMOS process with less than 10-15 W power consumption.
- Proposed and implemented an on-chip compensation mechanism that decreases the temperature-dependence of floating-gate current bias array on 0.5 um CMOS process by an order of magnitude.
- Implemented a linear programming interface enabling completely on-chip programming of non-volatile large-field analog memory on 0.5 um CMOS process with 60 dB linearity.
- Proposed and implemented a linear ultra-low-Gm transconductor using varactor degeneration and linearization technique on 0.5 um CMOS process with 50 dB linearity.
- Designed and simulated an 8-bit SAR ADC on 0.5 um CMOS process.
Design Engineer, Institution of Automation, Chinese Academy of Sciences 2010~2012
Design Engineer, Institution of Automation, Chinese Academy of Sciences 2010~2012
- Designed CMOS audio amplifiers with more than 100 dB gain and 250 mA output driving capacity.
- Designed and layout a battery charging management chip with protection features. The chip can optimize the charging process depending on the battery status using negative feedback mechanism.
- Designed 13.56 MHz RF front-end modules for RFID applications.
- Built and simulated a complete model of 12-bit pipeline ADC using Simulink & Matlab.
Presentations
Presentations
- "HPMAP: A Hash-Based Privacy-Preserving Mutual Authentication Protocol for Passive IoT Devices Using Self-Powered Timers ", lecture, ICC , Kansas City, MO, 2018
- "Securing passive IoT devices using self-powered timers", proposal defense, St. Louis, MO, 2017
- "Design of Self-powered Timer Ensembles for Dynamic Authentication of Passive Assets", poster and lecture, SRC TECHCON, Austin, TX, 2017
- "Self-powered Continuous Time-Temperature Monitoring for Cold-Chain Management", lecture, MWSCAS, Boston, MA, 2017
- "Secure Dynamic Authentication of Passive Assets and Passive IoTs using Self-powered Timers", poster, ISCAS, Baltimore, MD, 2017
- "Modeling of CMOS Zero-power Timers for Dynamic Authentication of Passive Assets", poster and lecture, SRC TECHCON, Austin, TX, 2016
- "Approaching the Limits of Piezoelectricity driven Hot-electron Injection for Self-powered in-vivo Monitoring of Micro-strain Variations", lecture, ISCAS, Montreal, Canada, 2016
- "Self-powered Sensing and Time-stamping of Rare Events using CMOS Fowler-Nordheim Tunneling Timers", lecture, ISCAS, Montreal, Canada, 2016
- "Scavenging Thermal-noise Energy for Implementing Long-term Self-powered CMOS Timers", lecture, ISCAS, Beijing, China, 2013
Awards and Honors
Awards and Honors
- Best paper award, IEEE ISCAS 2013
- Honorary mention for best paper award, IEEE ISCAS 2015
- Zeng Xianzi Scholarship, for three consecutive years, Tsinghua University 2007
- Yan yancun Scholarship, Department of Physics, Tsinghua University 2008
- Social Scholarship, Department of Physics, Tsinghua University 2009
Skills and Expertise
Skills and Expertise
- Hardware: Cadence, Hspice, Quartus II, Medici, Sentaurus, Verilog, FPGA
- Software: Python, C, C++, Java, Matlab
Core Courses
Core Courses
- Analog Integrated Circuits Design (A)
- Advanced VLSI Design (A)
- Electronic Devices (A)
- Advanced Algorithms (A)
- Computer Architecture (A)
- Machine Learning (A+)
- Artificial Intelligence (A+)
Academic Services
Academic Services
Journal Review
Journal Review
- IEEE Transactions on Biomedical Circuits and Systems
- IEEE Transactions on Circuits and Systems I
- IEEE Internet-of-Things Journal
- IEEE Access
Conference Review
Conference Review
- IEEE Biomedical Circuits and Systems Conference (2014, 2015, 2016)
- IEEE International Symposium on Circuits and Systems (2013, 2015, 2016, 2017, 2018)
- IEEE Midwest Circuits and Systems Conference (2013, 2017, 2018)