Dr. Mahnashi recvied the Excellence in Teaching Award from the College of Engineering & Physics, KFUPM, May 2022.
UTR: 8:00-9:00am, Bldg. 7 Room 131
Tel(O): +966(13)860-8369 or 7032
[Syllabus]
P1: Chip level (Transistor and Gate Level implmentations, etc)
P2: Algorithms ( RTL, State Machines, Arithmetic functions and Hardware Implementation, Verilog HDL, Timing issues
P3: System (Board) Level (Noise, Power Delivery)
[Syllabus]
T1: Device Modeling,
T2: Single-stage Amplifier
T3: Differential Amplifiers
T4: Biasing and Current Mirrors,
T5: Frequency Response,
T6: Opamp Design,
T7: CMOS Technology
T8: Noise analysis
[Syllabus]
Part I: Review of Analog Blocks
Part II: Layout techniques
Layout of Passives (resistors, caps, inductors).
CMOS Layout, floor planning,
IO pads, & Post-layout sim.
Part III: Architecture of some Analog Systems
Switched-capacitor circuits
Filters, Oscillators, and Data convertors
[Syllabus]
Module I: Design Process
Module II: Professional Skills
Module III: Design Tools
(each module has about 3-4 topics)
Fall 2019, Spring 2020
Fall 2019, Spring 2020
Fall 2018, Spring 2019
Fall 2019, Spring 2020
Spring 2013
Jointly developed with Dr. Alaa Eldin Hussein, EE-KFUPM
Topics related to Energy Harvesting and power managment
Coordinator
Committee Member
Committee Member