Edge AI Accelerator
Reconfigurable Systems
Low Power Circuits and Systems
FPGA/VLSI/Verilog HDL
Smart Wearable Devices and Systems
Design for Mission-critical and Harsh Environments
The lab is developing an edge AI accelerator system with a user-friendly framework involving instruction sets, and control software design. Currently, the team is also cooperating with an analogue team to develop mixed-signal edge AI devices. On the other hand, the team is also seeking a possible method to shorten the RTL design to market time by utilising machine learning. Overall, the interesting topics are listed below:
Edge AI accelerator system development (Utilising FPGA or cell-based ASIC)
Innovating hardware-efficient convolutional engines and pooling functions tailored for edge deployment.
Efficient software framework for edge AI accelerator (Utilising C or Python and Verilog)
Reconfigurable Computing Systems
Designing resource-aware reconfigurable hardware for flexible AI acceleration.
AI-Powered Communication Hardware
High-performance neural network-based (e.g., SW-Net) hardware for MIMO communication receivers.
Mission-Critical AIoT
Smart aquaculture applications, including ocean temperature early-warning systems and small-scale edge AI on ESP32.
Digital circuit design to handle analogue input signals for AI computation
Machine learning for RTL design
Underwater vision detection: Developing robust AI recognition systems for turbid underwater environments, focusing on real-time hardware acceleration.
Ocean Surface temperature detection
The lab is looking for master's students with machine learning and/or hardware experimental backgrounds, and undergraduate trainees are also welcome.
If you are interested in Edge AI hardware design, you are encouraged to join the lab. Feel free to contact Dr Weison Lin by email.
Refer to the page for master's program enrollment and scholarship.