Publications

PhD Thesis

[Thesis] V. Dubey, "Fine Pitch 3D-Integration Using Self-Aligned Assembly ", Katholieke Universiteit Leuven, 2017 [Online]

Patents

1. Vikas Dubey, Ingrid De Wolf, Eric Beyne, "Method for aligning micro-electronic components", US9799632B2, CN104733327B, EP2889900B1

2. Hans Goverde, Francky Catthoor, Vikas Dubey, Jef Poortmans, Christiaan Baert, "Simulation of photo voltaic modules", US10192009B2, EP2998756B1, JP6573809B2

3. Vikas Dubey, Eric Beyne, Jaber Derakhshandeh, "Method for self-aligned solder reflow bonding and devices obtained thereof", US9978710B2, EP3185290A1

4. Vikas Dubey, Eric Beyne, Giovanni Capuz , "Method for bonding semiconductor chips to a landing wafer", US10797016B2, CN108063111A

Journal Publications

1. V. Dubey, "Evaporation of confined droplet between parallel chips with varying gap at room temperature", J. Micromech. Microeng. 32 075001, 2022 [Online]

2. V. Dubey et. al., "Fine Pitch Rapid Heat Self-Aligned Assembly and Liquid-Mediated Direct Bonding of Si Chips" IEEE Trans. Compon., Packag., Manuf. Technol., 6, pp. 946–953, 2016 [Online]

3. V. Dubey et. al., "Physics of self-aligned assembly at room temperature", Physics of Fluids 30, 012001, 2018 [Online]

4. H. Goverde et. al., "Spatial and temporal analysis of wind effects on PV module temperature and performance", Sustainable Energy Technologies and Assessments, Vol. 11, Pages 36-41, 2015 [Online]

Conference Publications

1. V. Dubey et al. "Room temperature and zero pressure high quality oxide direct bonding for 3D self-aligned assembly" Proc. IEEE 16th Electron. Packag. Technol. Conf. (EPTC) pp. 579-582 Dec. 2014 [Online]

2. V. Dubey et. al., "Surface Treatment to Enable Low Temperature and Pressure Copper Direct Bonding", Proc. IEEE 66th ECTC, Las Vegas, NV, USA., May 2016 [Online]

3. J. Derakhshandeh et. al., "3D Stacking Using Bump-Less Process for Sub 10um Pitch Interconnects", Proc. IEEE 66th ECTC, Las Vegas, NV, USA, May 2016 [Online]

4. V. Dubey et. al., "Liquid mediated direct bonding and bond propagation", IEEE 6th ESTC, Grenoble, France, September 2016 [Online]

5. J. Derakhshandeh et. al., "Die to wafer 3D stacking for below 10um pitch microbumps", IEEE 3DIC, San Francisco, CA, USA, Nov 2016 [Online]

6. T. Wang et. al., "On the feasibility of die-to-wafer inorganic dielectric bonding", IEEE 6th ESTC, Grenoble France, September 2016 [Online]

7. V. Dubey et. al., "3D thermal model with high spatial and temporal resolution ", 27th EU PVSEC, Frankfurt, Germany, pp. 1339 - 1342, September 2012 [Online]