Papers & Publications 

Publications : Journals

 

1) G.Vijaya Krishna, T.Venkata Sridhar, K.Sudheer Kumar “Design and Implementation of Low Power Fast DCT Architecture Using Modified FGA Algorithm” IJSAA international journal, Pages 155-158, ISBN 978-81-923541-0-2, April 2012.

 

2) T.Venkata Sridhar, K.Bharat Kumar,  “Energy Efficient less leakage power SRAM Cell for SOC Memory Design” CiiT international journal with ISBN 978-1-4675-2245-8, May 2012

 

3) T.Venkata Sridhar, Sai Karthik “Implementing a SHA 224/256 Algorithm for Secure Commitment Applications using FPGA” , IOAJ journal with ISBN 978-81-923541-0-2, June 2012.

 

4) Ramesh Yallala, T.Venkata Sridhar, “FPGA Implementation of High Speed IEEE-754 Compliant Floating Point Multiplication”, IAIRS journal, Pages 68-71,  ISBN 978-93-82359-21-0, July 2013.

 

5) T.Venkata Sridhar, G. Chenchu Krishnaiah, “An Efficient and Low Power Reconfigurable Network-on-Chip” , IJCTA- International Science Press, volume  10 Issue 22, page 71-79, with ISSN 0974-5572, February 2017.

 

6) Tej Sai Ram J, Vivek Vardhan R, Venkata Sridhar T, “Low cost remote heart beat monitoring and abnormality prediction using Hadoop cluster”, International Journal of Scientific & Engineering Research Volume 9, Issue 4, April-2018; ISSN 2229-5518

 

7) T.Venkata Sridhar, G. Chenchu Krishnaiah, “A Systematic Routing-Algorithms for NoC Hardware” , IJCESR - Technical Research Organisation of India, volume  8 Issue 1, page 125-131, with ISSN 2394 -0697, DOI:10.21276/ijcesr, January 2021.

 

8) T.Venkata Sridhar, G. Chenchu Krishnaiah, “A Deadlock Free Adaptive Routing Algorithm With Low-Power Scheduling And Dynamic Task Mapping for NoC” , IRJET, India volume  8 Issue 2, page 1-7, with ISSN 2395 -0056, February 2021.

 

 

9) T.Venkata Sridhar, G. Chenchu Krishnaiah, “An Area Efficient Low-Power NoC Router For Multi-core Architectures”, Wesleyan Journal of Research, Bankura Christian College publications. Volume 14 Issue 1(XIV), page 105-111, March 2021.

 

 

10) T.Venkata Sridhar, G. Chenchu Krishnaiah, “Integrated Sensory Throughput and Traffic-Aware Arbiter for High Productive Multi-Core Architectures ”, Journal of Sensors, Hindawi publication. Volume 2022, https://doi.org/10.1155/2022/2911777 , page 1-14, Sep. 2022.

 

11) T.Venkata Sridhar, G. Chenchu Krishnaiah, “Communication Latency and Power Consumption Consequence in Multi-Core Architectures and Improvement Methods”,  International Journal of Electrical and Electronic Research, FOREX Publications. Volume 11 Issue-7 , DOI: 10.37391/ijeer.110130 , page 222-227, Mar. 2023.

Publications: Conferences

 

1) T.Venkata Sridhar, T. Sanath Kumar, “Relocation of Bitstreams for Partial Dynamic Reconfiguration on FPGA” in a national level conference at SV University, Tirupati, AP, India, on 1-2nd may 2010.

 

2) T. Venkata Sridhar, S. Suresh, Et.al “Fastening Access and Lowering Power Consumption in Displays for MIDS” in an International level conference at ICMID GRIET/JNTU-H, Hyderabad, AP, India, on 17-18th Dec 2010.

 

3) T. Venkata Sridhar, S. Suresh, Et.al “Development Of Fault Secure Encoder And Decoder For Nano Memory Applications” in an International level conference at ICAET-2011 conducted by EGSPEC/Anna Univ., Nagapattinam, Tamilnadu, India, on 27-28th may 2011.

 

4) T. Venkata Sridhar,  Et.al “High Speed Security Module for GPON Using AES Algorithm” in an AICTE & DRDO sponsored National level conference at CMRCET/JNTU-H, Kandlakoya,Hyderabad, AP, India, on 8-10th July 2011 

 

5) G.Vijaya Krishna, T.Venkata Sridhar, K.Sudheer Kumar “Design and Implementation of Low Power Fast DCT Architecture Using Modified FGA Algorithm” in an International level conference at ICRAET 2012, conducted by Association of Scholars & Professionals, Hyderabad, India. On 27- 28th April 2012.

 

6) T.Venkata Sridhar, K.Bharat Kumar “ Energy Efficieht less leakage power SRAM Cell for SOC Memory Design” in an International level conference at ICAET-2012 conducted by EGSPEC/Anna Univ., Nagapattinam, Tamilnadu, India.On 28-29th may 2012.

 

 

7) T.Venkata Sridhar, Sai Karthik,  “Implementing a SHA 224/256 Algorithm for Secure Commitment Applications using FPGA” in an International level conference at ICEEE, conducted by Interscience Open Access Journal (IOAJ) Tirupati, India. On 09th June 2012.

 

8) Ramesh Yallala, T.Venkata Sridhar, “FPGA Implementation of High Speed IEEE-754 Compliant Floating Point Multiplication” in an International level conference at ICITEC-2013, conducted by IAIRS, Hyderabad, India. On 06th – 07th July 2013.

 

9) T.Venkata Sridhar, Et.al “A Low Leakage Nano Scale CMOS Memory Cell with Virtual Ground” in an International level conference at ICEECE, conducted by IRAJ and SARC, Chennai, India. On 28th July 2013.

 

10) T.Venkata Sridhar, Et.al “Implementation of High Speed Secure Communication Between Multiple FPGA Systems Using RTOs” in an International level conference at ICIECE-2013, conducted by GNIT-Hyderabad, India. On 09th – 10th August 2013.

 

11) T.Venkata Sridhar, G. Chenchu Krishnaiah, "An Efficient and Low Power Reconfigurable Network-on-Chip" in an International level conference at ICAECS-2016, conducted by Vignan University, Guntur, India. On 08th – 10th Dec 2016.

 

12) T.Venkata Sridhar, G. Chenchu Krishnaiah, “An MSV and CG Based Design of Low-Power Network-on-Chip Architecture for SoC” at National level conference RTECE-17 conducted by SJCIT, Chikballapur, Karnataka on 3rd and 4th May-2017.

 

13) Tej Sai Ram J, Vivek Vardhan R, Venkata Sridhar T, “Low cost remote heart beat monitoring and abnormality prediction using Hadoop cluster”, at a two days National Conference  on ‘Emerging Trends in Engineering, Science and Manufacturing  (ETESM-2018)’ conducted by IGIT, Sarang, Odisha on 28th – 29th March 2018.

 

14) T.Venkata Sridhar, G. Chenchu Krishnaiah, “A Low Power Modified RNoC Architecture For Modern SoC Design.” at National level conference RTECE-18 conducted by SJCIT, Chikballapur, Karnataka on 10th May-2018.

 

15) S. Samanta and T. V. Sridha, "Modified Slow Fading Channel Estimation Technique And Fast Fading Channel Estimation Technique For OFDM Systems," 2018 3rd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT), Bangalore, India, 2018, pp. 1638-1643, doi: 10.1109/RTEICT42901.2018.9012125.

 

16) T.Venkata Sridhar, G. Chenchu Krishnaiah, “An Area Efficient Low-Power NoC Router For Multi-core Architectures” at National level conference NCIRIT 2020, conducted by SIRT, SAGE University, Indore on  June-2020.

 

17) T.Venkata Sridhar, G. Chenchu Krishnaiah, “The Effect of Latency and Power Consumption in Multi-Core Architectures and Suggested Methods for Improvement” at International level conference ICRCESM-2022, conducted by NRI Inst of Tech, Guntur, AP, India.  June-2022.

 

18) T.Venkata Sridhar, G. Chenchu Krishnaiah, “Power Efficient NoC For Multicore Soc Architectures” at National level conference NC - Research 2022 conducted by AVIT, Chennai, TN, India. July-2022. ISBN: 978-93-5659-451-7

 

 

Conference Attended (unpublished)

 

1) T.Venkata Sridhar, Attended International Conference on Information Technology- ICIT-2017 conducted by Orissa IT Society and SIT, Bhubaneswar, during 21st-23rd Dec-17.

 


Books & Book Chapter Publications

Book Chapters: (International and National)

 

1) T.Venkata Sridhar, G. Chenchu Krishnaiah, “Multicore Architectures and Its Applications in Image Processing”, High-Performance Medical Image Processing (Apple Academic Press). volume 328, chapter-4, pages: 14, July 2022. ISBN 9781774637227.


Workshops, FDPs and Webinars

1. A one day workshop on “embedded Systems” at NBKR IST, Vidyanagar.

2. A two day workshop on “DSP Tools and embedded Systems” at ASCET,Gudur.

3. A two day workshop on “VLSI and EDA Tools” at ASCET, Gudur.

4. A one day workshop on “Radar Systems” at SV Univ., Tirupati.

5. A one day workshop on “VLSI and FPGA” at NECN, Nellore.

6. A two day workshop on “CADENCE Design Tools at ASCET”, Gudur.

7. A three day workshop on" Digital Design & SOC using CADENCE Design Tools” at ASCET, Gudur.

8. A two day workshop on “VLSI Circuit Design using CADENCE Tools” at ASCET, Gudur.

9. An AICTE Sponsored 15 day FDP on “Recent Trends in Embedded Systems” at ASCET, Gudur.

10. A Two-Week Main Workshop on Signals & Systems between 2nd–12th January 2014. Conducted by IIT Kharagpur.

11. A Two-Week ISTE Main Workshop on Cyber Security between 10th–20th July 2014. Conducted by IIT Bombay.

12. A Two-Week ISTE Workshop on Control Systems between 2nd–12th December 2014. Conducted by IIT Kharagpur.

13. A Two-Week ISTE Short Term Training Programme (STTP) on Pedagogy for Effective use of ICT in Engineering Education between 19th– 31st January 2015. Conducted by IIT Bombay.

14. A Two Week ISTE STTP on Introduction to Design of Algorithms between 25th–30th May 2015. Conducted by IIT Kharagpur.

15. A Two-Week ISTE STTP on Technical Communication between 08th–12th Oct 2015 and 30th Nov – 05th Dec 2015. Conducted by IIT Bombay.

16. A Two-Week ISTE STTP on Engineering Physics between 08th–18th December 2015. Conducted by IIT Bombay

17. A one day FDP at IIIT-Bhubaneswar on Networking Simulation using NetSim Software with DELLSOFT Technologies Pvt. Ltd. On 1st June 2017.

18. A workshop on Popularisation of Remote Sensing Based Maps and Geospatial Information’, organised by Indian Society of Remote Sensing and Indian Space Research Organisation on the eve of National Remote Sensing Day on August 11, 2017.

19. A one day workshop on Writing competitive research grant proposal by IEEE Banglore section and SJCIT, Banglore on 27th April 2020.

20. A one day webinar on learning ML by IEEE Banglore section and IEEE RITB on 16th May 2020.

21. A one day live webinar on AI & ML organized by GIST, Nellore, AP on 29th May 2020.

22. A one day webinar on Power of CMOS VLSI Circuits by IEEE Banglore section on 20th June 2020.

23. A Five day online FDP on Contemporary Research Trends in Electronics & Communications, Computer Science by VTU, Belgavi and IETE between 6th to 10th July 2020.

24. A one day webinar on Trends and challenges on SoC design by BIT Banglore, on 11th July 2020.

25. A one day Professional Development Workshop on Digital Creativity Skills by AICTE, APAC India and Adobe on 5th April 2023.