Program

8:00am - 8:15am: Welcome and Opening Remarks

8:15am - 9:15am: Opening Talk by Prof. Joel Emer:

"Research by the Book: Ideas that have helped guide a 50 year research career"

Abstract. Over course of my 50 year career in computer architecture research, I have worked on a wide variety of different projects. While the technical focus of those projects has varied greatly, there have been a set of principles that I find have repeatedly guided me across those projects. Those ideas have included how to cope with the complexity of current computer architectures, how to productively develop new architectural ideas and a possible explanation of why I tend to be so obsessed with taxonomies. Many of those principles have been informed, inspired or refined by ideas from different books that I have read. So in this talk, I will try to enumerate some of those principles along with the source books that discuss them and connect them to projects I have been involved with.

Finally with a look toward the future, I will relate a book-inspired principle on how to view what I currently perceive as the biggest challenge for future computer architecture research. More specifically, how should we approach the end of the long-term technology scaling trends (usually referred to as Moore's Law and Denard scaling). In that context, I will discuss my philosophical perspective on the important attributes of current architectures and provide some thoughts on how to both why to preserve those attributes and how we might create future computer architectures.

Joel S. Emer is a Professor of the Practice at MIT's Electrical Engineering and Computer Science Department (EECS) and a member of the Computer Science and Artificial Intelligence Laboratory (CSAIL). He is also a Senior Distinguished Research Scientist at Nvidia in Westford, MA, where he is responsible for exploration of future architectures as well as modeling and analysis methodologies. Prior to joining Nvidia, he worked at Intel where he was an Intel Fellow and Director of Microarchitecture Research. Previously he worked at Compaq and Digital Equipment Corporation (DEC).

For nearly 50 years, Dr. Emer has held various research and advanced development positions investigating processor micro-architecture and developing performance modeling and evaluation techniques. He has made architectural contributions to a number of VAX, Alpha and X86 processors and is recognized as one of the developers of the widely employed quantitative approach to processor performance evaluation. He has also been recognized for his contributions in the advancement of deep learning accelerator design, spatial and parallel architectures, processor reliability analysis, memory dependence prediction, pipeline and cache organization, performance modeling methodologies and simultaneous multithreading. He earned a doctorate in electrical engineering from the University of Illinois in 1979. He received a bachelor's degree with highest honors in electrical engineering in 1974, and his master's degree in 1975 -- both from Purdue University. Among his honors, he is a Fellow of both the ACM and IEEE, and a member of the NAE. He also received both the Eckert-Mauchly award and the B. Ramakrishan Rau award for lifetime contributions in computer architecture.

9:15am -10:00am: Panel 1: "Life in Grad School"