Publications
Book chapters
Yiyu Tan, Toshiyuki Imamura, and Daichi Mukunoki: Parallel Computing: Technology Trends, pp. 241-250, IOS Press, 2020.
Journal papers
Yiyu Tan, Toshiyuki Imamura, and Masaaki Kondo: FPGA-based acceleration of FDTD sound field rendering, Journal of the Audio Engineering Society, Vol. 69, No. 7/8, pp. 542-556, 2021.
Tan Yiyu: A hardware-oriented object model for Java in an embedded processor, Microprocessors and Microsystems, Vol. 63, pp. 85-97, 2018.
Tan Yiyu, Yasushi Inoguchi, Makoto Otani, Yukio Iwaya, and Takao Tsuchiya: A real-time sound field rendering processor, Applied Sciences, Vol. 8, No. 35, 2018.
Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya: A real-time sound rendering system based on finite-difference time-domain algorithm, Japanese Journal of Applied Physics, Vol. 53, 07KC14 (eight pages), 2014.
Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, and Takao Tsuchiya: Design and implementation of a two-dimensional sound field solver based on the Digital Huygens’ Model, Microprocessors and Microsystems, Vol. 38, pp. 216-225, 2014.
Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya: A hardware-oriented finite-difference time-domain algorithm for sound field rendering, Japanese Journal of Applied Physics, Vol. 52, 07HC03 (six pages), 2013.
Tan Yiyu, Yasushi Inoguchi, Eiko Sugawara, Makoto Otani, Yukio Iwaya, Yukinori Sato, Hiroshi Matsuoka, and Takao Tsuchiya: A real-time sound field renderer based on Digital Huygens’ model, Journal of Sound and Vibration, Vol. 330, pp. 4302-4312, 2011.
Tan Yiyu, Yau Chihang, Anthony S. Fong: An instruction folding solution for a Java processor, Computer Systems Science and Engineering, Vol. 24, No. 3, pp. 133-143, 2009.
Yiyu Tan, Y. H. Yau, K. M. Lo, W. S. Yu, P. L. Mok, and A. S. Fong, Design and implementation of a Java processor, IEE Proceedings on Computers and Digital Techniques, Vol. 153, No. 1, pp. 20-30, 2006.
Tan Yiyu, Lo Wan Yiu, Yau Chi Hang, Richard Li, and Anthony S. Fong: A Java processor with hardware-support object-oriented instructions, Microprocessors and Microsystems, Vol. 30, No. 8, pp. 469-479, 2006.
Conference proceedings
Yiyu Tan, Xin Lu, Guangfei Liu, Peng Chen, and Yusuke Tanimu, “Design of FPGA-based High-order FDTD Method for Room Acoustics,” the 26th International Conference on Digital Audio Effects (DAFx23), Copenhagen, Denmark, pp. 304-311, Sept. 2023.
Yiyu Tan, Xin Lu, Peng Chen, and Yusuke Tanimura, “FPGA-based Acceleration on Sound Field Rendering”,電子情報通信学会機能集積情報システム研究会,June 2023.
Boma Adhi, Carlos Cortes, Emanuele Del Sozzo, Tomohiro Ueno, Yiyu Tan, Takuya Kojima, Artur Podobas, and Kentaro Sano, “Less for More: Reducing Intra-CGRA Connectivity for Higher Performance and Efficiency in HPC”, The Second International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing, May 2023.
Carlos Cortes, Boma Adhi, Tomohiro Ueno, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano, “Evaluation of reduced routing resources for HPC-Oriented CGRAs ”, リコンフィギャラブルシステム研究会, Jan. 2023. (non-peer-reviewed)
Boma Adhi, Carlos Cortes, Tomohiro Ueno, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano, “Exploring Inter-tile Connectivity for HPC-oriented CGRA with Lower Resource Usage ”, International Conference on Field Programmable Technology (IEEE FPT), Dec. 2022
Boma Adhi, Carlos Cortes, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano, “The Cost of Flexibility: Embedded versus Discrete Routers in CGRAs for HPC”, IEEE Cluster, Sept. 2022.
Boma Adhi, Carlos Cortes, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano, “Exploration Framework for Synthesizable CGRAs Targeting HPC: Initial Design and Evaluation”, The First International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing, May 2022.
Takuya Kojima, Carlos Cesar Cortes Torres, Boma Adhi, Yiyu Tan, Kentaro Sano, “An Architecture-Independent CGRA Compiler enabling OpenMP Applications”, The First International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing, May 2022.
Boma Adhi, Carlos Cortes, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano, “Initial Design and Evaluation of RIKEN CGRA: Data-Driven Architecture for Future HPC”, リコンフィギャラブルシステム研究会, Jan. 2022. (non-peer-reviewed)
小島拓也, Carlos Cesar Cortes Torres, Boma Adhi, Yiyu Tan, 佐野健太郎, “HPC向けRIKEN CGRAのためのコンパイル環境整備と予備評価”, リコンフィギャラブルシステム研究会, Jan. 2022. (non-peer-reviewed)
Yiyu Tan and Toshiyuki Imamura: Design of an FPGA-based Matrix Multiplier with Task Parallelism, International Conference on Parallel Computing, Prague, Czech, September 2019.
Yiyu Tan and Toshiyuki Imamura: Performance Evaluation and Tuning of an OpenCL Based Matrix Multiplier, Proceedings of the 24th International Conference on Parallel and Distributed Processing Techniques and Applications, pp. 107-113, 2018.
Yiyu Tan and Toshiyuki Imamura: An Energy-Efficient FPGA-based Matrix Multiplier, Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, pp. 514-517, 2017.
Tan Yiyu, Yasushi Inoguchi, Makoto Otani, Yukio Iwaya, and Takao Tsuchiya: Design of a Real-time Sound Field Rendering Processor, Proceedings of the RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 173-176, 2016.
Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya: Design of a FPGA-based Timing Sharing Architecture for Sound Rendering Applications, Proceedings of the International Conference on Information Technology: Next Generations, pp. 484-489, 2012.
Anthony S. Fong, Chihang Yau, and Tan Yiyu: An Object-Oriented Processor with Just-In-Time Compilation Support, Proceedings of International Symposium on Computer, Communication, Control and Automation, pp. 299-302, 2010.
Tan Yiyu, Yau Chihang, Anthony S. Fong: An Object Model for Java and Its Architecture Support, Proceedings of the Sixth International Conference on Information Technology: New Generations, pp. 831-836, 2009.
C. H. Yau, Y. Y. Tan, A. S. Fong, and P. L. Mok: An Extensive Hardware/software Co-design on a Descriptor-based Embedded Java Processor, Proceedings of the 9th International Conference for Young Computer Scientists, pp. 142-147, 2008.
C. H. Yau, Y. Y. Tan, A. S. Fong, and P. L. Mok: Embedded Architectural Design Using Protection Logics to Defend Attack of Buffer Overflow and Unauthorized Access of Code, Proceedings of the IEEE International Conference on Computer and Information Technology Workshops, pp. 264-269, 2008.
Tan Yiyu, Anthony S. Fong, Yang Xiaojian: Architectural Solution to Object-oriented Programming, the 12th Asia-Pacific Computer Systems Architecture Conference, Lecture Notes in Computer Science, Vol. 4697, pp. 387-398, 2007.
Tan Yiyu, Anthony S. Fong, Yang Xiaojian: An Instruction Folding Solution to a Java Processor, the 2007 IFIP International Conference on Network and Parallel Computing (NPC), Lecture Notes in Computer Science, Vol. 4672, pp. 415-424, 2007.
Tan YiYu, Lo Kai Man and Fong Anthony S.: A Performance Analysis of an Object-oriented Processor, Proceedings of the Third International Conference on Information Technology: Next Generations, pp. 690-694, 2006.
Tan Yiyu, Yau Chihang, and Anthony Fong: Architectural Support on Object-Oriented Programming in a JAVA Processor, the IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP), pp. 303-310, 2006.
Yiyu Tan, Chihang, Yau, Kaiman Lo, Paklun Mok, and Anthony S. Fong: A Novel Java Processor for Embedded Devices, the 5th International Conference on Embedded Computer Systems: architectures, Modeling, and Simulation, Lecture Notes in Computer Science, Vol. 3553, pp. 112-121, 2005.
Chi Hang Yau, Yi Yu Tan, Anthony S. Fong, Wing Shing Yu: Hardware Concurrent Garbage Collection for Short-lived Objects in Mobile Java Devices, the 2005 International Conference on Embedded and Ubiquitous Computing, Lecture Notes in Computer Science, Vol. 3824, pp. 47-56, 2005.
Chi Hang Yau, Yi Yu Tan, Pak Lun Mok, Wing Shing Yu, Anthony S. Fong: A Hardware/Software Co-design and Co-verification on a Novel Embedded Object-Oriented Processor, the 2005 International Conference on Embedded and Ubiquitous Computing, Lecture Notes in Computer Science, Vol. 3824, pp. 371-380, 2005.
Tan Yiyu, Lo Kai Man, Mok Pak Lun, Yu Wing Shing, and Anthony S. Fong: A Java Processor for Mobile Devices, Proceedings of the IEEE International Conference on Consumer Electronics, pp. 437-438, 2005.
Yau Chi Hang, Tan Yiyu, Fong Anthony S.: A Novel Just-In-Time Compiler on an Embedded Object-Oriented Processor, Proceedings of the IEEE International Conference on Computer and Information Technology, pp. 764-770, 2005.
Tan Yiyu and Zhang Ning: An Image Processing System Scheme in B Mode Ultrasonic Ophthalmological Scanner, Proceedings of the 16th IEEE Symposium Computer-Based Medical Systems, pp. 74-79, 2003.
Posters(peer-reviewed)
Peng Chen, Yiyu Tan , Du Wu ,Mohamed Wahib , Yusuke Tanimura,“Efficient Edge-Cloud Computing and Communication Platform”,The 5th R-CCS International Symposium, Jan. 2024.
Yiyu Tan, Xin Lu, Guanghui Liu, Peng Chen, Truong Thao Nguyen, and Yusuke Tanimura, “An FPGA-based Sound Field Renderer for High-Precision Sound Field Auralization”, High Performance Computing in the Asia-Pacific Region (HPC Asia), Feb. 2023.
Yiyu Tan, Xin Lu, Guanghui Liu, Peng Chen, Yusuke Tanimura, “High-Performance Sound Field Auralization”, The 5th R-CCS International Symposium, Feb. 2023.
Xin Lu and Yiyu Tan, “Probability Density Function Estimation for a Transformed Normal Random Vector”, The 5th R-CCS International Symposium, Feb. 2023.
Yiyu Tan, Toshiyuki Imamura, Masaaki Kondo, “FPGA-based Acceleration on Sound Field Rendering”, The 4th R-CCS International Symposium, Feb. 2022.
Carlos Cesar Cortes Torres, Boma Anantasatya Adhi, Tan Yiyu, Takuya Kojima, Artur Podobas, Kentaro Sano, “Parameterized environment for evaluating a CGRA for HPC”, The 4th R-CCS International Symposium, Feb. 2022.
Yiyu Tan, Toshiyuki Imamura, Masaaki Kondo, “An FPGA-based Accelerator for Sound Field Rendering with High-order FDTD”, International Conference on High Performance Computing in Asia-Pacific Region, Jan. 2022.
Boma Adhi, Carlos Cortes, Yiyu Tan, Takuya Kojima, Artur Podobas, Kentaro Sano, “RIKEN CGRA: Reconfigurable Data-Driven Architecture for Future HPC”, International Conference on High Performance Computing in Asia-Pacific Region, Jan. 2022.
Boma Adhi, Takuya Kojima, Yiyu Tan, Artur Podobas, Kentaro Sano, “RIKEN CGRA: Data-Driven Architecture as an Extension of Multicore CPU for Future HPC”, International Conference on High Performance Computing, Networking, Storage, and Analysis, Nov. 2021.
Yiyu Tan, Toshiyuki Imamura, Masaaki Kondo, the 3nd R-CCS International Symposium, Feb. 2021.
Yiyu Tan, Toshiyuki Imamura, Daichi Mukunoki, “An FPGA-based Matrix Multiplier with Task Parallelism”, the 2nd R-CCS International Symposium, Feb. 2020.
Roman Iakymchuk, Fabienne Jezequel, Stef Graillat, Daichi Mukunoki, Toshiyuki Imamura, Yiyu Tan, Atsushi Koshiba, “Optimizing Precision for High-performance, Robust, and Energy-efficient Computations”, International Conference on High Performance Computing in Asia-pacific Region (HPC Asia), Jan. 2020.
Tan Yiyu, Toshiyuki Imamura, “Sound Rendering and its Acceleration Using FPGA”, International Conference on High Performance Computing in Asia-pacific Region (HPC Asia), Feb. 2020.
Yiyu Tan, Toshiyuki Imamura, Masaaki Kondo: Design and Implementation of High-order FDTD Method for Room Acoustics, Proceedings of the 41th Symposium on Ultrasonic Electronics, 2Pb2-1, Nov., 2020.
Yiyu Tan and Toshiyuki Imamura: An FPGA-based Sound Field Rendering System, Proceedings of the IEEE Cluster, pp. 414-415, 2020.
Tan Yiyu and Toshiyuki Imamura: High-order FDTD Method for Room Acoustic Simulation, Proceedings of the 40th Symposium on Ultrasonic Electronics, 2P2-3, 2019.
Yiyu Tan and Toshiyuki Imamura: An FPGA-based Accelerator for Sound Field Rendering, Proceedings of the 22nd International Conference on Digital Audio Effects, Birmingham, UK, pp. 219-225, 2019.
Yiyu Tan and Toshiyuki Imamura: Performance Evaluation of a Toolkit for Sparse Tensor Decomposition, Proceedings of the 27th International Symposium on High-Performance Parallel and Distributed Computing, pp. 5-6, 2018.
Yiyu Tan and Toshiyuki Imamura: An Energy-Efficient FPGA-based Matrix Multiplier, Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, pp. 514-517, 2017.
Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya: A Real-time Sound Field Rendering based on the Finite Difference Time Domain Algorithm, Proceedings of the 34th Symposium on Ultrasonic Electronics, pp. 235-236, 2013.
Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya: A Hardware-oriented FDTD Algorithm for Sound Field Rendering, the 33th Symposium on Ultrasonic Electronics, pp. 321-322, 2012.
Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya: Analysis of Sound Field Distribution for Room Acoustics: from the Point of View of Hardware Implementation, Proceedings of the 15th International Conference on Digital Audio Effects, pp. 93-96, 2012.
Yasushi Inoguchi, Tan Yiyu, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya: DHM and FDTD based hardware sound field simulation acceleration, Proceedings of the 14th International Conference on Digital Audio Effects, pp. 69-72, 2011.
Tan Yiyu, Yukinori Sato, Eiko Sugawara, Yasushi Inoguchi, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya: A FPGA Implementation of the Two-Dimensional Digital Huygens’ Model, Proceedings of the International Conference on Field Programmable Technology, pp. 304-307, 2010.
Other papers in Japanese and Chinese
Tan Yiyu, Li Chen, Li Yuan: A Design and Implementation of Interface Between Network Processor and CAM, Application of Electronic Technique, Vol. 4, 2003.
Tan Yiyu, Li Yuan: An Implementation for Digital Scan Converter (DSC) by using FPGA, Chinese Journal of Medical Instrumentation,Vol. 25, No. 4, pp. 213-214, 2001.
Tan Yiyu, Bian Wenbing, Li Yuan: A CORDIC-Based Coordinate Transform Circuit, Journal of Data Acquisition and Processing, Vol. 16, No. 2, pp. 257-260, 2001.
Tan Yiyu, Li Yuan: A/D Converter Technology in Software Radio, Journal of Electron Devices, Vol.23, No.3, pp. 173-178, 2000.
Tan Yiyu, Bian Wenbing, Li Yuan: An R-θ Transform ASIC Based on CORDIC Algorithm, Microelectronics, Vol. 30, No. 3, pp. 166-167, 2000.
Fang Chenzhi, Tan Yiyu, Li Yuan: Implementation of PPMC Based-on MPC8260 Processor, Application of Electronic Technique, Vol. 29, No. 9, pp. 14-17, 2002.
Wang Le, Li Yuan, Tan Yiyu: A Novel Built-In-Self-Test Scheme for Carry-Look-Ahead Adders, Microelectronics, Vol. 32, No. 3, pp. 195-197, 2002.
Shan Ming, Li Yuan, Tan Yiyu: An Improved Direct Digital Synthesizer with Reduced Spurious Noise, Microelectronics, Vol. 32, No. 2, pp. 117-119, 2002.
Fang Chenzhi, Li Yuan, Tan Yiyu: An Implementation of I2 C circuit Based on the Means of Cycle Accurate Property, Microelectronics and Computer, Vol. 19, No. 10, pp. 35-37, 2002.
Fang Chenzhi, Li Yuan, Tan Yiyu: Designing an I2 C Host Controller for Embedded Systems, Microcomputer and Application, No. 6, 2003.
A Processor for Real-time Sound Field Rendering, Tan Yiyu, 井口寧, 大谷真, 岩谷幸雄,土屋隆生, 2015年度 電気関係学会 北陸支部連合大会, 金沢工大,Sep.12, 2015.
A Prototype of Real-time Sound Rendering System,Tan Yiyu, 井口 寧, 佐藤 幸紀, 大谷真, 岩谷 幸雄, 土屋 隆生,2014年度 電気関係学会 北陸支部連合大会, F1-3,富山高専,Sep. 11, 2014.
メモリの階層化によるハードウェア音楽電子指紋の高速検索,佐々木 泰, 佐藤 幸紀, Yiyu Tan, 井口 寧,2013年度 電気関係学会 北陸支部連合大会, F1-14,金沢大学,Sep. 21, 2013.
物理マシン温度を考慮したクラウドの仮想マシン割り当て方式,大和 良介, 佐藤 幸紀, Yiyu Tan, 井口 寧,2013年度 電気関係学会 北陸支部連合大会, F1-13,金沢大学,Sep. 21, 2013.
GPGPUとMICにおけるアクセラレータ性能の比較,中吉 達二, 佐藤 幸紀, Yiyu Tan, 井口 寧,2013年度 電気関係学会 北陸支部連合大会, F1-10,金沢大学,Sep. 21, 2013.
FPGAによるリアルタイム音響シミュレーション,井口 寧, Yiyu Tan, 佐藤 幸紀, 大谷 真, 岩谷 幸雄, 松岡 浩, 土屋 隆生,2012年度 電気関係学会 北陸支部連合大会, F-24,富山県立大学,Sep. 2, 2012.
Searching Acceleration for Audio Fingerprinting System,Fan Yang, 佐藤 幸紀, Yiyu Tan, 井口 寧,2012年度 電気関係学会 北陸支部連合大会, F-15,富山県立大学,Sep. 1, 2012.
Presentations
Yiyu Tan, Toshiyuki Imamura, “Precision Tuning of Arithmetic Units in Matrix Multiplication on FPGA”, SIAM Conference on Parallel Processing for Scientific Computing, March 2020.
Yiyu Tan and Toshiyuki Imamura: Design of an FPGA-based Matrix Multiplier with Task Parallelism, International Conference on Parallel Computing, Prague, Czech, September 2019.
Yiyu Tan and Toshiyuki Imamura: Performance Evaluation and Tuning of an OpenCL Based Matrix Multiplier, Proceedings of the 24th International Conference on Parallel and Distributed Processing Techniques and Applications, pp. 107-113, 2018.
Yiyu Tan and Toshiyuki Imamura, “The SPLATT Toolkit on the K Computer”, SIAM Conference on Parallel Processing for Scientific Computing, Tokyo, Japan, March 2018.
Tan Yiyu, Yasushi Inoguchi, Makoto Otani, Yukio Iwaya, and Takao Tsuchiya: Design of a Real-time Sound Field Rendering Processor, Proceedings of the RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, pp. 173-176, 2016.
Tan Yiyu, Yasushi Inoguchi, Yukinori Sato, Makoto Otani, Yukio Iwaya, Hiroshi Matsuoka, and Takao Tsuchiya: Design of a FPGA-based Timing Sharing Architecture for Sound Rendering Applications, Proceedings of the International Conference on Information Technology: Next Generations, pp. 484-489, 2012.
Tan Yiyu, Yau Chihang, Anthony S. Fong: An Object Model for Java and Its Architecture Support, Proceedings of the Sixth International Conference on Information Technology: New Generations, pp. 831-836, 2009.
Tan Yiyu, Anthony S. Fong, Yang Xiaojian: Architectural Solution to Object-oriented Programming, the 12th Asia-Pacific Computer Systems Architecture Conference, Lecture Notes in Computer Science, Vol. 4697, pp. 387-398, 2007.
Tan Yiyu, Anthony S. Fong, Yang Xiaojian: An Instruction Folding Solution to a Java Processor, the 2007 IFIP International Conference on Network and Parallel Computing (NPC), Lecture Notes in Computer Science, Vol. 4672, pp. 415-424, 2007.
Tan YiYu, Lo Kai Man and Fong Anthony S.: A Performance Analysis of an Object-oriented Processor, Proceedings of the Third International Conference on Information Technology: Next Generations, pp. 690-694, 2006.
Tan Yiyu, Yau Chihang, and Anthony Fong: Architectural Support on Object-Oriented Programming in a JAVA Processor, the IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP), pp. 303-310, 2006.
Yiyu Tan, Chihang, Yau, Kaiman Lo, Paklun Mok, and Anthony S. Fong: A Novel Java Processor for Embedded Devices, the 5th International Conference on Embedded Computer Systems: architectures, Modeling, and Simulation, Lecture Notes in Computer Science, Vol. 3553, pp. 112-121, 2005.
Tan Yiyu, Lo Kai Man, Mok Pak Lun, Yu Wing Shing, and Anthony S. Fong: A Java Processor for Mobile Devices, Proceedings of the IEEE International Conference on Consumer Electronics, pp. 437-438, 2005.
Tan Yiyu and Zhang Ning: An Image Processing System Scheme in B Mode Ultrasonic Ophthalmological Scanner, Proceedings of the 16th IEEE Symposium Computer-Based Medical Systems, pp. 74-79, 2003.