Journal

2024

• Vertical AND-Type Flash Synaptic Cell Stack for High-Density and Reliable Binary Neural Networks

J Kim, J Im, S Oh, W Shin, G Jung, ST Lee, JH Lee

IEEE Electron Device Letters

• Review of Neuromorphic Computing Based on NAND Flash Memory 

ST Lee, JH Lee

Nanoscale horizons

• Towards Ideal Low-Frequency Noise in Monolayer CVD MoS2 FETs: Influence of van der Waals Junctions and Sulfur Vacancy Management 

 W Shin, J Byeon, R Koo, J Lim, J Kang, A Jang, J Lee, J Kim, S Cha, S Pak, ST Lee 

Advanced Science

• Examination of Ferroelectric Domain Dynamics in HZO under Endurance Cycling Stress 

 RH Koo, W Shin,S Ryu, S Kim, G Jung, ST Lee, J Kim, D Kwon, JH Lee

IEEE Electron Device Letters 

• A More Practical Indicator of MAC Operational Power Efficiency inside Memory-based Synapse Array

S Cho, ST Lee, S Kim, H Shin

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 

• Significant Reduction of 1/f Noise in Organic Thin-Film Transistors with Self-Assembled Monolayer: Considerations of Density-of-States  

W. Shin, J. Bae, J. H. Park, J. -H. Lee, C. -H. Kim and ST Lee,  

IEEE Electron Device Letters 

• Charge Transport Advancement in Anti‐Ambipolar Transistors: Spatially Separating Layer Sandwiched between N‐Type Metal Oxides and P‐Type Small Molecules.  

      Han, Y., Lee, S., Kim, M., Shin, W., Lee, H. K., Koo, R. H., ST Lee, Kim C.& Yoo, H. 

Advanced Functional Materials, 2316217.

• Deep Spiking Neural Networks with Integrate and Fire Neuron Using Steep Switching Device 

S Woo, S Pak, ST Lee

Solid-State Electronics, 108860 

• Proposition of optimal self-curing method in horizontal-floating gate FET-type gas sensors for reliability improvement

W Shin, RH Koo, S Hong, Y Jeong, G Jung, ST Lee, JH Lee

Sensors and Actuators B: Chemical, 135247

2023

• Unveiled Influence of Sub‐gap Density of States on Low‐Frequency Noise in Si‐Doped ZnSnO TFTs: Does Correlated Mobility Fluctuation Model Suffice

W Shin, JY Lee, RH Koo, J Kim, JH Lee, SY Lee, ST Lee

Advanced Electronic Materials, 2300515

• Effects of Sensor Platform Scaling on Signal-to-Noise Ratio in the Resistor-and Horizontal Floating-Gate FET-Type Gas Sensors 

W Shin, R-H Koo, S Hong, G Jung, Y Jeong, ST Lee, JH Lee

    IEEE Transactions on Electron Devices, 2023

• Annealing Ambient and Film Thickness Dependent NO Response and 1/ Noise Characteristics of IGZO Resistor-Type Gas Sensors 

W Shin, R-H Koo, S Hong, Y Jeong, G Jung, ST Lee, JH Lee

    IEEE Transactions on Electron Devices, 2023

• Observation of interface trap reduction in fluoropolymer dielectric organic transistors by low-frequency noise spectroscopy

W Shin, J Shin, JH Lee, H Yoo, ST Lee 

    Applied Physics Letters, Vol. 122, Iss. 26, June 2023  

• Neuromorphic Computing Using Random Synaptic Feedback Weights for Error Backpropagation in NAND Flash Memory-Based Synaptic Devices

ST Lee, JH Lee

    IEEE Transactions on Electron Devices, vol. 70, no. 3, pp. 1019-1024, March 2023

2022

• Investigation of Deep Spiking Neural Networks Utilizing Gated Schottky Diode as Synaptic Devices 

ST Lee, JH Bae

Micromachines, 13(11) 

• Novel, parallel and differential synaptic architecture based on NAND flash memory for high-density and highly-reliable binary neural networks

ST Lee, H Kim, H Yoo, D Kwon, JH Lee 

Neurocomputing 

2016-2021

• SiO2 Fin-Based Flash Synaptic Cells in AND Array Architecture for Binary Neural Networks

S Lee, H Kim, ST Lee, BG Park, JH Lee

IEEE Electron Device Letters 43 (1), 142-145

• Utilization of Unsigned Inputs for NAND Flash-Based Parallel and High-Density Synaptic Architecture in Binary Neural Networks

ST Lee, G Yeom, J Hwang, H Kim, H Yoo, BG Park, JH Lee

IEEE Journal of the Electron Devices Society 9, 1049-1054, *Received IEEE EDS Leo Asaki Award 

• Novel Method Enabling Forward and Backward Propagations in NAND Flash Memory for On-Chip Learning

ST Lee, G Yeom, H Yoo, HS Kim, S Lim, JH Bae, BG Park, JH Lee

IEEE Transactions on Electron Devices 68 (7), 3365-3370

• Pruning for hardware-based deep spiking neural networks using gated schottky diode as synaptic devices

ST Lee, S Lim, JH Bae, D Kwon, HS Kim, BG Park, JH Lee

Journal of Nanoscience and Nanotechnology 20 (11), 6603-6608

• Low-Power Binary Neuron Circuit With Adjustable Threshold for Binary Neural Networks Using NAND Flash Memory

ST Lee, SY Woo, JH Lee

IEEE Access 8, 153334-153340

• Effect of Word-Line Bias on Linearity of Multi-Level Conductance Steps for Multi-Layer Neural Networks Based on NAND Flash Cells

ST Lee, S Lim, N Choi, JH Bae, D Kwon, HS Kim, BG Park, JH Lee

Journal of Nanoscience and Nanotechnology 20 (7), 4138-4142

• NAND flash based novel synaptic architecture for highly robust and high-density quantized neural networks with binary neuron activation of (1, 0)

ST Lee, D Kwon, H Kim, H Yoo, JH Lee

IEEE Access 8, 114330-114339

• Efficient precise weight tuning protocol considering variation of the synaptic devices and target accuracy

H Kim, JH Bae, S Lim, ST Lee, YT Seo, D Kwon, BG Park, JH Lee

Neurocomputing 378, 189-196

• Neuromorphic computing using NAND flash memory architecture with pulse width modulation scheme

ST Lee, JH Lee

Frontiers in Neuroscience, 945

• On-chip training spiking neural networks using approximated backpropagation with analog synaptic devices

D Kwon, S Lim, JH Bae, ST Lee, H Kim, YT Seo, S Oh, J Kim, K Yeom, B-G Park, J-H Lee

Frontiers in neuroscience, 423

• Adaptive learning rule for hardware-based deep neural networks using electronic synapse devices

S Lim, JH Bae, JH Eum, S Lee, CH Kim, D Kwon, BG Park, JH Lee

Neural Computing and Applications 31 (11), 8101-8116

• Operation scheme of multi-layer neural networks using NAND flash memory as high-density synaptic devices

ST Lee, S Lim, NY Choi, JH Bae, D Kwon, BG Park, JH Lee

IEEE Journal of the Electron Devices Society 7, 1085-1093

• Gated Schottky Diode-Type Synaptic Device with a Field-Plate Structure to Reduce the Forward Current

JH Bae, S Lim, D Kwon, ST Lee, H Kim, JH Lee

Journal of Nanoscience and Nanotechnology 19 (10), 6135-6138

• Synaptic device using a floating fin-body MOSFET with memory functionality for neural network

SY Woo, KB Choi, S Lim, ST Lee, CH Kim, WM Kang, D Kwon, JH Bae, B-G Park, J-H Lee

Solid-State Electronics 156, 23-27

• Highly reliable inference system of neural networks using gated Schottky diodes

S Lim, D Kwon, JH Eum, ST Lee, JH Bae, H Kim, CH Kim, BG Park, J-H Lee

IEEE Journal of the Electron Devices Society 7, 522-528

• Near-linear potentiation mechanism of gated Schottky diode as a synaptic device

JH Bae, S Lim, D Kwon, JH Eum, ST Lee, H Kim, BG Park, JH Lee

IEEE Journal of the Electron Devices Society 7, 335-343

• Reconfigurable field-effect transistor as a synaptic device for XNOR binary neural network

JH Bae, H Kim, D Kwon, S Lim, ST Lee, BG Park, JH Lee

IEEE Electron Device Letters 40 (4), 624-627

• Adaptive weight quantization method for nonlinear synaptic devices

D Kwon, S Lim, JH Bae, ST Lee, H Kim, CH Kim, BG Park, JH Lee

IEEE Transactions on Electron Devices 66 (1), 395-401

• Emerging memory technologies for neuromorphic computing

CH Kim, S Lim, SY Woo, WM Kang, YT Seo, ST Lee, S Lee, D Kwon, S Oh, ...

Nanotechnology 30 (3), 032001

• Multi-layer WSe2 field effect transistor with improved carrier-injection contact by using oxygen plasma treatment

WM Kang, ST Lee, IT Cho, TH Park, H Shin, CS Hwang, C Lee, BG Park, J-H Lee

Solid-State Electronics 140, 2-7

• Accurate extraction of WSe2 FETs parameters by using pulsed IV method at various temperatures

ST Lee, IT Cho, WM Kang, BG Park, JH Lee

Nano convergence 3 (1), 1-5