個人介紹

學歷(Education):

國立中央大學 電機工程學系 博士

Department of Electrical Engineering, National Central University

經歷(Experience):

工研院 電子與光電系統所 半導體晶片與設計組 組長

元智大學 助理教授

工研院 電子與光電系統所 奈米電子技術組 研發副組長兼積體電路設計與系統應用部經理

工研院 電子與光電研究所 智慧感測器設計與系統應用部 部門經理

工研院 電子與光電研究所 積體電路設計與系統應用部 部門經理

國立臺北大學 電機工程學系 約聘專任助理教授

工研院 電子與光電研究所 積體電路設計與系統應用部 部門經理

工研院 電子與光電研究所 積體電路設計與應用部 專案經理

工研院 電子與光電研究所 積體電路設計與應用部 專案副理

著作

Journal Articles

1. Meng-Fan Chang, Chien-Chen Lin, Albert Lee, Yen-Ning Chiang, Chia-Chen Kuo, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, “A 3T1R Nonvolatile TCAM Using MLC ReRAM for Frequent-Off Instant-On Filters in IoT and Big-Data Processing,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol.pp, no.99., pp.1–16, Apr. 2017 (SCI ,EI)

2. Tsai-Kan Chien; Lih-Yih Chiou, Shyh-Shyuan Sheu, Jing-Cian Lin, Chang-Chia Lee, Tzu-Kun Ku, Ming-Jinn Tsai, Chih-I Wu, “Low-Power MCU With Embedded ReRAM Buffers as Sensor Hub for IoT Applications,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol.6, no.2, pp.247–257, Jun. 2016 (SCI ,EI)

3. Meng-Fan Chang, Lie-Yue Huang, Wen-Zhang Lin, Yen-Ning Chiang, Chia-Chen Kuo, Ching-Hao Chuang, Keng-Hao Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, “A ReRAM-Based 4T2R Nonvolatile TCAM Using RC-Filtered Stress-Decoupled Scheme for Frequent-OFF Instant-ON Search Engines Used in IoT and Big-Data Processing,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol.51, no.11., pp.2786–2798, Nov. 2016 (SCI ,EI)

4. Meng-Fan Chang, Meng-Fan Chang, Albert Lee, Pin-Cheng Chen, Chrong Jung Lin, Ya-Chin King, Shyh-Shyuan Sheu, and Tzu-Kun Ku, “Challenges and Circuit Techniques for Energy-Efficient On-Chip Nonvolatile Memory Using Memristive Devices,” IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, vol.5, no.2, pp.183–193, Jun. 2015 (SCI ,EI)

5. Sing-Kai Huang, Jing-Yuan Wang, Chiao-Han Lan, Shawn S. H. Hsu, Sih-Han Li, Pei-Ling Tseng, Chih-Sheng Lin, and Shyh-Shyuan Sheu, “An Ultra Compact Millimeter-Wave VCO in 3-D IC Technology,” IEEE MICROWAVE AND WIRELESS COMPOENTS LETTERS, vol.24, no.4, pp.251–253, Apr. 2015 (SCI ,EI)

6. Ching-Yi Chen, Hsiu-Chuan Shih, Cheng-Wen Wu, Chih-He Lin, Pi-Feng Chiu, Shyh-Shyuan Sheu, and Frederick T. Chen, “RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme,” IEEE TRANSACTIONS ON COMPUTERS, vol.64, no.1, pp.180–190, Jan. 2015 (SCI ,EI)

7. Meng-Fan Chang, Shu-Meng Yang, Chia-Chen Kuo, Ting-Chin Yang, Che-Ju Yeh, Tun-Fei Chien, Li-Yue Huang, Shyh-Shyuan Sheu, Pei-Ling Tseng, Yu-Sheng Chen, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, and Ming-Jer Kao, “Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications,” IEEE TRANSACTIONS OF S CIRCUITS AND SYSTEM II, vol.62, no.1, pp.80–84, Jan. 2015 (SCI ,EI)

8. Meng-Fan Chang, Chia-Chen Kuo, Shyh-Shyuan Sheu, Chorng-Jung Lin, Ya-Chin King, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, Jui-Jen Wu, and Yue-Der Chih, “Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol.49, no.4, pp.908–916, Apr. 2014 (SCI ,EI)

9. Meng-Fan Chang, Chih-Sheng Lin, Wei-Cheng Wu, Ming-Pin Chen, Yen-Huei Chen, Zhe-Hui Lin, Shyh-Shyuan Sheu, Tzu-Kun Ku, Cha-Hsin Lin, and Hiroyuki Yamauchi, “A High Layer Scalability TSV-Based 3D-SRAM With Semi-Master-Slave Structure and Self-Timed Differential-TSV for High-Performance Universal-Memory-Capacity-Platforms,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol.48, no.6, pp.1521–1528, Mar. 2013 (SCI ,EI) Ranking: 21/242

10. Meng-Fan Chang, Shyh-Shyuan Sheu, Ku-Feng Lin, Che-Wei Wu, Chia-Chen Kuo, Pi-Feng Chiu, Yih-Shan Yang, Yu-Sheng Chen, Heng-Yuan Lee, Chen-Hsin Lien, Frederick T. Chen, Keng-Li Su, Tzu-Kun Ku, Ming-Jer Kao, and Ming-Jinn Tsai, “A High-Speed (sub-8ns) Read-Write Random Access 4Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol.48, no.3, pp.878–891, Mar. 2013 (SCI ,EI) Ranking: 21/242

11. Shyh-Shyuan Sheu, Kuo-Hsing Cheng, Yu-Sheng Chen, Pang-Shiu Chen, Ming-Jinn Tsai, and Yu-Lung Lo, “A 50ns Verify Speed in Resistive random access memory by using a Write Resistance Tracking Circuit,” IEICE TRANSACTIONS ON ELECTRONICS, vol.E95-C, no.6, pp.1128–1131 Jun. 2012 (SCI, EI) Ranking: 213/242

12. Pi-Feng Chiu, Meng-Fan Chang, Che-Wei Wu, Ching-Hao Chuang, Shyh-Shyuan Sheu, Yu-Sheng Chen, and Ming-Jinn Tsai, “Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol.47, no.6, pp.1483–1496 Jun. 2012 (SCI, EI)

13. Cheng-Ta Ko, Zhi-Cheng Hsiao, Yao-Jen Chang, Peng-Shu Chen, Yu-Jiau Hwang, Huan-Chun Fu, Jui-Hsiung Huang, Chia-Wen Chiang, Shyh-Shyuan Sheu, Yu-Hua Chen, Wei-Chung Lo, and Kuan-Neng Chen, “A Wafer-Level Three-Dimensional Integration Scheme With Cu TSVs Based on Microbump/Adhesive Hybrid Bonding for Three-Dimensional Memory Application,” IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, vol.12, no.3, pp.209–216 Jun. 2012 (SCI, EI)

14. Shyh-Shyuan Sheu, Kuo-Hsing Cheng, Meng-Fan Chang, Pei-Chia Chiang, Wen-Pin Lin, Heng-Yuan Lee, Pang-Shiu Chen, Yu-Sheng Chen, Tai-Yuan Wu, Frederick T. Chen, Keng-Li Su, Mign-Jer Kao, and Ming-Jinn Tsai, “Fast-Write Resistive RAM (RRAM) for Embedded Applications,” IEEE Design & Test of Computers, vol.28, no.1, pp.64–71 Jan. 2011 (SCI, ECT) Ranking: 80/242

15. Shyh-Shyuan Sheu, Zhe-Hui Lin, Jui-Feng Hung, John H. Lau, Peng-Shu Chen, Shih-Hsien Wu, Keng-Li Su, Chih-Sheng Lin, Shinn-Juh Lai, Kuo-Hsing Cheng, Tzu-Kun Ku, Wei-Chung Lo, Ming-Jer Kao “An Electrical Testing Method for Blind Through Silicon Vias (TSVs) for 3D IC Integration,” Journal of Microelectronics & Electronic Packaging, vol.8, no.4, pp. 140-145 4^th Qtr 2011. (EI)

16. Ching-Hua Wang, Yi-Hung Tsai, Kai-Chun Lin, Meng-Fan Chang, Ya-Chin King, Chrong Jung Lin, Shyh-Shyuan Sheu, Yu-Sheng Chen, Heng-Yuan Lee, Frederick T. Chen and Ming-Jinn Tsai, “Three-Dimensional 4F² ReRAM With Vertical BJT Driver by CMOS Logic Compatible Process,” IEEE TRANSACTIONS ON ELECTRON DEVICES, vol.58, no.8, pp.2466–2472 Aug. 2011 (SCI, EI)

17. Chiang, M.-H.; Liao, Y.-B.; Lin, J.-T.; Hsu, W.-C.; Yu, C.; Chiang, P.-C.; Hsu, Y.-Y.; Liu, W.-H.; Sheu, S.-S.; Su, K.-L.; Kao, M.-J.; Tsai, M.-J., “Low power design of phase-change memory based on a comprehensive model,” IET Computers & Digital Techniques, vol.4, no.4, pp.285–292 Jun. 2010 (SCI, EI)

18. 林哲輝、林志和、許世玄 “高通量核酸定序技術與DNA感測系統” 電光先鋒, PP.68-73, 2011年12月

19. 邱必芬、許世玄、林文斌、林志和 “應用於低耗能可攜式裝置之非揮發性8T2R靜態隨機存取式記憶體” 電光先鋒, PP.90-96, 2011年4月

20. 李思翰、賴信吉、許世玄、黃尊禧 “ 利用3DIC矽穿孔製程技術開發積體電感元件之研究” 電光先鋒, PP.58-66, 2010年11月

Conference Papers

1. Tsai-Kan Chien, Lih-Yih Chiou, Chang-Chia Lee, Yao-Chun Chuang, Shien-Han Ke, Shyh-Shyuan Sheu, Heng-Yuan Li, Pei-Hua Wang, Tzu-Kun Ku, Ming-Jinn Tsai, Chih-I Wu, “An energy-efficient nonvolatile microprocessor considering software-hardware interaction for energy harvesting applications,” IEEE Symposium on VLSI Design, Automation and Test (VLSI-DAT), pp.1-4, Apr. 2016

2. Tsai-Kan Chien, Lih-Yih Chiou, Chieh-Wen Cheng, Shyh-Shyuan Sheu, Pei-Hua Wang, Ming-Jinn Tsai, Chih-I Wu, “Memory access algorithm for low energy CPU/GPU heterogeneous systems with hybrid DRAM/NVM memory architecture ,” IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), pp.461-464, Oct. 2016

3. Tsai-Kan Chien, Lih-Yih Chiou, Chieh-Wen Cheng, Shyh-Shyuan Sheu, Pei-Hua Wang, Ming-Jinn Tsai, Chih-I Wu, “A low store energy and robust ReRAM-based flip-flop for normally off microprocessors,” IEEE International Symposium on Circuits and Systems (ISCAS), pp.2803-2806,May. 2016

4. Meng-Fan Chang, Ching-Hao Chuang, Yen-Ning Chiang, Shyh-Shyuan Sheu, Chia-Chen Kuo, Hsiang-Yun Cheng, John Sampson, Mary Jane Irwin, “Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell,” IEEE International Symposium on Circuits and Systems (ISCAS), pp.1142-1145,May. 2016

5. Meng-Fan Chang, Chien-Chen Lin, Albert Lee, Chia-Chen Kuo, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, Pei-Ling Tseng, Heng-Yuan Lee, Tzu-Kun Ku, “A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time ,” IEEE International Solid-State Circuits Conference (ISSCC), pp.318-319, Feb. 2015.

6. Meng-Fan Chang, Wang-Ying Lu, Shin-Jang Shen, Ming-Pin Chen, Chih-Sheng Lin, S. -S. Sheu, C. -H. Hung, Y. -S. Yang; Y. -J. Kuo, S. -N. Hung, H. -T. Lue, Chang-Hong Shen, Jia-Min Shieh, “Supply-variation-resilient nonvolatile 3D IC and 3D memory using low peak-current on-chip charge-pump circuits,” IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), pp.118-121, Oct. 2015.

7. Albert Lee, Meng-Fan Chang, Chien-Chen Lin, Chien-Fu Chen, Mon-Shu Ho, Chia-Chen Kuo, Pei-Ling Tseng, Shyh-Shyuan Sheu, and Tzu-Kun Ku “RRAM-based 7T1R Nonvolatile SRAM with 2x Reduction in Store Energy and 94x Reduction in Restore Energy for Frequent-Off Instant-On Applications,” IEEE Symposium on VLSI Circuits (VLSIC), pp.C76-77 Jun. 2015

8. S. H. Li, C. S. Lin, P. L. Tseng, P. J. Tzeng, S. S. Sheu, Shawn S. H. Hsu, C. H. Wang, W. C. Lo, and T. K. Ku, “Fully 3-D Symmetrical TSV Monolithic Transformer for RFIC,” IEEE Electronic Components and Technology Conference (ECTC). pp.987-993, Jun. 2015

9. Meng-Fan Chang, Chien-Chen Lin, Albert Lee, Chia-Chen Kuo, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, Pei-Ling Tsen, Heng-Yuan Lee, Tzu-Kun Ku “A 3T1R Nonvolatile TCAM Using MLC ReRAM with Sub-1ns Search Time ,” IEEE International Solid-State Circuits Conference (ISSCC), pp.318-319, Feb. 2015.

10. Wen-Pin Lin, Shyh-Shyuan Sheu, Chia-Chen Kuo, Pei-Ling Tseng, Meng-Fan Chang, Keng-Li Su, Chih-Sheng Lin, Kan-Hsueh Tsai, Sih-Han Lee, Szu-Chieh Liu1,Yu-Sheng Chen, Heng-Yuan Lee, Ching-Chih Hsu, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, Ming-Jer Kao, “A Non-volatile Look-up Table Using ReRAM for Reconfigurable Logic,” IEEE Asian Solid-State Circuits Conference (A-SSCC), pp.133-136, Nov. 2014

11. Li-Yue Huang, Meng-Fan Chang, Ching-Hao Chuang, Chia-Chen Kuo, Chien-Fu Chen, Geng-Hau Yang, Hsiang-Jen Tsai, Tien-Fu Chen, Shyh-Shyuan Sheu, Keng-Li Su, Frederick T. Chen, Tzu-Kun Ku, Ming-Jinn Tsai, and Ming-Jer Kao “ReRAM-based 4T2R Nonvolatile TCAM with 7x NVM-Stress Reduction, and 4x Improvement in Speed-WordLength-Capacity for Normally-Off Instant-On Filter-Based Search Engines Used in Big-Data Processing,” IEEE Symposium on VLSI Circuits (VLSIC), Jun. 2014

12. Frederick T. Chen, Heng-Yuan Lee, Yu-Sheng Chen, Shakh Ziaur Rahaman, Chen-Han Tsai, Kan-Hsueh Tsai, Tai-Yuan Wu, Wei-Su Chen, Pei-Yi Gu, Yu-De Lin, Shyh-Shyuan Sheu, Ming-Jinn Tsai, Li-Heng Lee, Tzu-Kun Ku, “Resistance Instabilities in a Filament-based Resistive Memory,” IEEE International Reliability Physics Symposium (IRPS), Apr. 2013

13. Shyh-Shyuan Sheu, Chia-Chen Kuo, Meng-Fan Chang, Pei-Ling Tseng, Chih-Sheng, Lin, Min-Chuan Wang, Chih-He Lin, Wen-Pin Lin, Tsai-Kan Chien, Sih-Han Lee, Szu-Chieh Lee, Heng-Yuan Lee, Pang-Shiu Chen, Yu-Sheng Chen, Ching-Chih Hsu, Frederick T. Chen, Keng-Li Su, Tzu-Kun Ku, Ming-Jinn Tsai, Ming-Jer Kao, “A ReRAM Integrated 7T2R Non-volatile SRAM for Normally-off Computing Application,” IEEE Asian Solid-State Circuits Conference (A-SSCC), pp.245-248, Nov. 2013

14. Meng-Fan Chang, Chia-Cheng Ku, Shyh-Shyuan Sheu, Chorng-Jung Lin, Ya-Chin King, Zhe-Hui Lin, Keng-Li Su, Yu-Sheng Chen, Wen-Pin Lin, Heng-Yuan Lee, Chen-Han Tsai, Wei-Su Chen, Frederick T. Chen, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai, Jui-Jen Wu, Yu-Der Chih, and Sreedhar Natarajan “Area-Efficient Embedded RRAM Macros with Sub-5ns Random-Read-Access-Time Using Logic-Process Parasitic-BJT-Switch (0T1R) Cell and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme,” IEEE Symposium on VLSI Circuits (VLSIC), pp.C112-C113, Jun. 2013

15. Wen Chao Shen, Chin Yu Mei, Y. -D. Chih, Shyh-Shyuan Sheu, Ming-Jinn Tsai, Ya-Chin King, Chrong Jung Lin, “High-K Metal Gate Contact RRAM (CRRAM) in Pure 28nm CMOS Logic Process,” IEEE International Electron Device Meeting (IEDM), pp.745- 748, Dec. 2012.

16. S.S. Sheu, Z.H. Lin, C. S. Lin, J. H. Lau, S.H. Lee, K. L. Su, T. K. Ku, S. H. Wu, J. F. Hung, P. S. Chen, S. J. Lai, W.C. Lo and M. J. Kao, “Electrical Characterization of Through Silicon Vias (TSVs) with an On Chip Bus Driver for 3D IC Integration,” IEEE Electronic Components and Technology Conference (ECTC). pp.851-856, Jun. 2012

17. Jui-Feng Hung, John H. Lau, Peng-Shu Chen, Shih-Hsien Wu, Shinn-Juh Lai, Ming-Lin Li, Shyh-Shyuan Sheu, Pei-Jer Tzeng, Zhe-Hui Lin, Tzu-Kun Ku, Wei-Chung Lo, Ming-Jer Kao, “Electrical Testing of Blind Through-Silicon Via (TSV) for 3D IC Integration,” IEEE Electronic Components and Technology Conference (ECTC). pp.564-570, Jun. 2012

18. Chen, Y. S.; Lee, H. Y.; Chen, P. S.; Tsai, C. H.; Gu, P. Y.; Wu, T. Y.; Tsai, K. H.; Sheu, S. S.; Lin, W. P.; Lin, C. H.; Chiu, P. F.; Chen, W. S.; Chen, F. T.; Lien, C.; Tsai, M.-J., “Challenges and opportunities for HfOX based resistive random access memory,” IEEE International Electron Device Meeting (IEDM), pp.31.3.1- 31.3.4, Dec. 2011.

19. Meng-Fan Chang, Pi-Feng Chiu, Wei-Cheng Wu, Ching-Hao Chuang, Shyh-Shyuan Sheu, “Challenges and Trends in Low-Power 3D Die-Stacked IC Designs Using RAM, Memristor Logic, and Resistive Memory (ReRAM),” IEEE International Conference on ASIC, pp.299-302, Nov.2011.

20. Shyh-Shyuan Sheu, Zue-Hua Lin, Jui-Feng Hung, John.H.Lau, Peng-Shu Chen, Shih-Hsien Wu, Keng-Li Su, Chih-Sheng Lin, Shinn-Juh Lai, Tzu-Kun Ku, Wei-Chung Lo, Ming-Jer Kao, “An Electrical Testing Method for Blind Through Silicon Vias (TSVs) for 3DIC integration,” International Symposium on Microelectronics and Packaging (IMAPS), pp.208-214, Oct.2011.

21. Meng-Fan Chang, Pi-Feng Chiu, Ching-Hao Chuang, Che-Wei Wu, Mon-Shu Ho, Ping-Cheng Chen, Shyh-Shyuan Sheu, Ming-Jinn Tsai, Tzu-Kun Ku, “Challenges and Trends of Resistive Memory (Memristor) Based Circuits for 3D-IC Applications,” International Solid State Devices and Materials (SSDM), pp.1053-1054, Sep. 2011

22. J. Wang, T. Huang, Y. Wu, S. Hsu, Z. Lin, C. Lin, S. Sheu, T. Ku, and C. Lin, “Testkey design of through silicon vias (TSVs) for accurate de-embedding and RF model parameters extraction,” International Solid State Devices and Materials (SSDM), pp.62-63, Sep. 2011

23. Meng-Fan Chang, Wei-Cheng Wu, Chih-Sheng Lin, Pi-Feng Chiu, Ming-Bin Chen, Yen-Huei Chen, Hsin-Chi Lai, Zhe-Hui Lin, Shyh-Shyuan Sheu, Tzu-Kun Ku, Yamauchi, H., “A larger stacked layer number scalable TSV-based 3D-SRAM for high-performance universal-memory-capacity 3D-IC platforms,” IEEE Symposium on VLSI Circuits (VLSIC), pp.74-75, Jun. 2011

24. Hsiu-Chuan Shih, Ching-Yi Chen, Cheng-Wen Wu, Chih-He Lin, and Shyh-Shyuan Sheu, “Training-based forming process for RRAM yield improvement ,” IEEE VLSI Test Symposium, pp. 146-151, May. 2011.

25. Shyh-Shyuan Sheu, Meng-Fan Chang, Ku-Feng Lin, Che-Wei Wu, Yu-Sheng Chen, Pi-Feng Chiu, Chia-Chen Kuo, Yih-Shan Yang, Pei-Chia Chiang, Wen-Pin Lin, Che-He Lin, Heng-Yuan Lee, Pei-Yi Gu, Sum-Min Wang, Chen, F.T., Keng-Li Su, Chen-Hsin Lien, Kuo-Hsing Cheng, Hsin-Tun Wu, Tzu-Kun Ku, Ming-Jer Kao, and Ming-Jinn Tsai, “A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability ,” IEEE International Solid-State Circuits Conference (ISSCC), pp.200-202, Feb. 2011.

26. Meng-Fan Chang; Pi-Feng Chiu and Shyh-Shyuan Sheu, “Circuit design challenges in embedded memory and resistive RAM (RRAM) for mobile SoC and 3D-IC ,” Asia and South Pacific Design Automation Conference (ASPDAC), pp.197-203, Jan. 2011.

27. Lee, H.Y.; Chen, Y.S.; Chen, P.S.; Gu, P.Y.; Hsu, Y.Y.; Wang, S.M.; Liu, W.H.; Tsai, C.H.; Sheu, S.S.; Chiang, P.C.; Lin, W.P.; Lin, C.H.; Chen, W.S.; Chen, F.T.; Lien, C.H.; Tsai, M. J., “Evidence and solution of over-RESET problem for HfOX based resistive memory with sub-ns switching speed and high endurance,” IEEE International Electron Device Meeting (IEDM), pp.19.7.1- 19.7.4, Dec. 2010.

28. Ching-Hua Wang, Yi-Hung Tsai, Kai-Chun Lin, Meng-Fan Chang, Ya-Chin King, Chrong-Jung Lin, Shyh-Shyuan Sheu, Yu-Sheng Chen, Heng-Yuan Lee, Chen, F.T., and Ming-Jinn Tsai, “Three-dimensional 4F² ReRAM cell with CMOS logic compatible process,” IEEE International Electron Device Meeting (IEDM), pp.29.6.1- 29.6.4, Dec. 2010.

29. Pi-Feng Chiu, Meng-Fan Chang, Shyh-Shyuan Sheu, Ku-Feng Lin, Pei-Chia Chiang, Che-Wei Wu, Wen-Pin Lin, Chih-He Lin, Ching-Chih Hsu, Chen, F.T., Keng-Li Su, Ming-Jer Kao, and Ming-Jinn Tsai, “A low store energy, low VDDmin, nonvolatile 8T2R SRAM with 3D stacked RRAM devices for low power mobile applications,” IEEE Symposium on VLSI Circuits (VLSIC), pp.229-230, Jun. 2010

30. Yi-Hsuan Chiu, Yi-Bo Liao, Meng-Hsueh Chiang, Chia-Long Lin, Wei-Chou Hsu, Pei-Chia Chiang, Yen-Ya Hsu, Wen-Hsing Liu, Shyh-Shyuan Sheu, Keng-Li Su, Ming-Jer Kao, and Ming-Jinn Tsai, “Impact of resistance drift on multilevel PCM design,” IEEE International Conference on IC Design and Technology (ICICDT), pp.20-23, Jun. 2010.

31. Chen, Y.S., Lee, H.Y., Chen, P.S., Gu, P.Y., Chen, C.W., Lin, W.P., Liu, W.H., Hsu, Y.Y., Sheu, S.S., Chiang, P.C., Chen, W.S., Chen, F.T., Lien, C.H., and Tsai, M.-J., “Highly scalable hafnium oxide memory with improvements of resistive distribution and read disturb immunity,” IEEE International Electron Device Meeting (IEDM), Dec., 2009.

32. Jun-Tin Lin, Yi-Bo Liao, Meng-Hsueh Chiang, I-Hsuan Chiu, Chia-Long Lin, Wei-Chou Hsu, Pei-Chia Chiang, Shyh-Shyuan Sheu, Yen-Ya Hsu, Wen-Hsing Liu, Keng-Li Su, Ming-Jer Kao, and Ming-Jinn Tsai;, “Design optimization in write speed of multi-level cell application for phase change memory,” IEEE International Conference of Electron Device and Solid-State Circuits (EDSSC), pp.525-528, Dec. 2009.

33. Shyh-Shyuan Sheu, Pei-Chia Chiang, Wen-Pin Lin, Heng-Yuan Lee, Pang-Shiu Chen, Yu-Sheng Chen, Tai-Yuan Wu, Frederick T. Chen, Keng-Li Su, Ming-Jer Kao, Kuo-Hsing Cheng, Ming-Jinn Tsai, “A 5ns fast write multi-level non-volatile 1 K bits RRAM memory with advance write scheme ,” IEEE Symposium on VLSI Circuits (VLSIC), pp.82-83, Jun. 2009

34. Shyh-Shyuan Sheu, Lieh-Chiu Lin, Wen-Hao Wang, Pei-Chia Chiang, Keng-Li Su, Ming-Jer Kao, Kuo-Hsing Cheng, Ming-Jinn Tsai, “4-Mb SPI Flash Compatible Phase-Change Memory ,” IEEE Symposium on VLSI Design, Automation and Test (VLSI-DAT), pp.82-83, Apr. 2007

得獎事績 (Awards)

1. 榮獲106年 工研院電光系統所 傑出研究獎銅牌2017/01/12

2. 榮獲105年 資訊月 智慧健康照護類 百大創新產品獎 2016/12/03

3. 榮獲105年 工研院電光系統所 第一季研究創新獎第一名 智能感測便利貼2016/04/21

4. 榮獲104年 工研院電光系統所 第四季服務與推廣獎優質IP：RRAM專利授權 2016/04/21

5. 榮獲102年 新竹區企業經理協進會 研究發展管理 傑出經理獎

6. 榮獲工研院102年工研菁英

7. 榮獲工研院獎項 102年推廣服務獎 (凝聚IC產業新動能，三維晶片技術整合及推動) 2013/05/30

8. 榮獲工研院獎項 101年年度論文獎2012/11/30

9. 榮獲工研院電光所獎項 101年第一季優良著作獎 (投稿至2012 JSSC被獲接受) 2012/04/30

10. 榮獲工研院電光所獎項 101年第一季優良著作獎 (2011 IEDM被獲接受) 2012/04/30

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