Keynotes

Abstract:

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Genome analysis is the foundation of many scientific and medical discoveries as well as a key pillar of personalized medicine. Any analysis of a genome fundamentally starts with the reconstruction of the genome from its sequenced fragments. This process is called read mapping. One key goal of read mapping is to find the variations and similarities that are present between the sequenced genome and reference genome(s) and to tolerate the errors introduced by the genome sequencing process. Read mapping is currently a major bottleneck in the entire genome analysis pipeline because state-of-the-art genome sequencing technologies are able to sequence a genome much faster than the computational techniques that are employed to reconstruct the genome. New sequencing technologies, like nanopore sequencing, greatly exacerbate this problem while at the same time making genome sequencing much less costly.

This talk describes our ongoing journey in greatly improving the performance of genome read mapping as well as broader genome analysis. We first provide a brief background on read mappers that can comprehensively find genomic variations/similarities and tolerate sequencing errors. Then, we describe both algorithmic and hardware-based acceleration approaches. Algorithmic approaches exploit the structure of the genome, the structure of the problem at hand, as well as the structure of the underlying hardware. Hardware-based acceleration approaches exploit specialized microarchitectures or new execution paradigms like processing in memory. We show that significant improvements are possible with both algorithmic and hardware-based approaches and their combination. We conclude with a foreshadowing of future challenges brought about by very low-cost new sequencing technologies and their potential use cases in public health, science, and medicine.

Bio:

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Onur Mutlu is a Professor of Computer Science at ETH Zurich. He is also a faculty member at Carnegie Mellon University, where he previously held the Strecker Early Career Professorship. His current broader research interests are in computer architecture, systems, hardware security, and bioinformatics. A variety of techniques he, along with his group and collaborators, has invented over the years have influenced industry and have been employed in commercial microprocessors and memory/storage systems. He obtained his PhD and MS in ECE from the University of Texas at Austin and BS degrees in Computer Engineering and Psychology from the University of Michigan, Ann Arbor. He started the Computer Architecture Group at Microsoft Research (2006-2009), and held various product and research positions at Intel Corporation, Advanced Micro Devices, VMware, and Google. He

received the Intel Outstanding Researcher Award, IEEE High Performance Computer Architecture Test of Time Award, the IEEE Computer Society Edward J. McCluskey Technical Achievement Award, ACM SIGARCH Maurice Wilkes Award, the inaugural IEEE Computer Society Young Computer Architect Award, the inaugural Intel Early Career Faculty Award, US National Science Foundation CAREER Award, Carnegie Mellon University Ladd Research Award, faculty partnership awards from various companies, and a healthy number of best paper or "Top Pick" paper recognitions at various computer systems, architecture, and security venues. He is an ACM Fellow "for contributions to computer architecture research, especially in memory systems", IEEE Fellow for "contributions to computer architecture research and practice", and an elected member of the Academy of Europe

(Academia Europaea). His computer architecture and digital logic design course lectures and materials are freely available on YouTube (https://www.youtube.com/OnurMutluLectures), and his research group makes a wide variety of software and hardware artifacts freely available online (https://safari.ethz.ch/). For more information, please see his webpage at https://people.inf.ethz.ch/omutlu/.

Abstract: The traditional logic abstractions and digital design patterns we understand so well have co-evolved with the hardware technology that has embodied them and the environments that have hosted them. As we look to the future, there is no reason to think that those same abstractions and patterns best exploit the potential of novel devices or take on new applications. In this talk, we will reimagine the traditional digital/analog boundary and make a case for temporal computing, where time is neither a measure of quality nor a functional property but instead a computational resource. Towards this end, we will first introduce a computational temporal logic that establishes the foundation for this new paradigm. Then, we will demonstrate how this foundation opens up unique ways in which we can work with sensors and design machine learning systems. Finally, we will describe how temporal operators provide answers to several long-lasting problems in pulse-based computing -- specifically, superconducting.

Bio: George Tzimpragos is a Ph.D. candidate in Computer Science at UC Santa Barbara and a research affiliate at Lawrence Berkeley National Laboratory. His research explores how computer architecture concepts, along with a deeper understanding of the nature of computation and devices, can be used to develop cross-stack solutions for emerging applications and technologies. His work has been rewarded with an ASPLOS best paper award, a CACM research highlight, an IEEE Micro top pick, and an IEEE Micro top pick honorable mention. He is also the creator of https://thejjunction.org, a platform for the exchange of ideas and resources on superconducting computing.