Seonyoung Lee, Kyeongsoon Cho and Seogil Hong, “Design of a Two-Dimensional Discrete Wavelet Transform Core for Image Compression,” Journal of the Korean Physical Society, Vol. 38, No.3, pp. 224-231, March 2001.
Seonyoung Lee and Kyeongsoon Cho, “RCC: An RC Compression System for Interconnect Circuits,” Journal of the Korean Physical Society, Vol. 41, No. 6, pp. 982-987, December 2002.
Seonyoung Lee and Kyeongsoon Cho, “Low-Power Real-Time Video CODEC for 16-Channel DVR Security System,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E87-A, No. 6, pp. 1290-1296, June 2004.
Sungoh Kim, Seonyoung Lee and Kyeongsoon Cho, “Efficient Scheduling Method to Reduce Memory Requirement for Lifting-Based 2D DWT Circuit,” IEE Electronics Letters, Vol. 40, No. 22, pp. 1450-1451, October 2004.
Kyeongsoon Cho, “Delay Calculation Capturing Crosstalk Effects due to Coupling Capacitors,” IEE Electronics Letters, Vol. 41, No. 8, pp. 458-460, April 2005.
Seonyoung Lee and Kyeongsoon Cho, “Design of a Low-Power Real-Time Wavelet CODEC Circuit,” Current Applied Physics, Vol 5, Issue 4, pp. 365-372, May 2005.
Seonyoung Lee and Kyeongsoon Cho, “An Efficient Architecture of High-Performance Deblocking Filter for H.264/AVC,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol. E89-A, No.6, pp.1736-1739, June 2006.
Seonyoung Lee and Kyeongsoon Cho, “Architecture of Transform Circuit for Video Decoder Supporting Multiple Standards,” IET Electronics Letters, Vol.44, No.4, pp.274-275, February 2008.
Jihye Yoo, Seonyoung Lee and Kyeongsoon Cho, “Design of High-Performance Intra Prediction Circuit for H.264 Video Decoder,” Journal of Semiconductor Technology and Science, Vol. 9, No. 4, pp. 187-191, December 2009.
SoojinKim, Seonyoung Lee and Kyeongsoon Cho, “Design of High-performance Unified Circuit for Linear and Non-linear SVM Classifications,” Journal of Semiconductor Technology and Science, Vol. 12, No. 2, pp. 162-167, June 2012.
Soojin Kim and Kyeongsoon Cho, “Design of High-Performance All-Digital Clock Recovery Circuit Requiring Short Preamble Data,” International Journal on Engineering Applications, Vol. 1, No. 2, pp. 101-105, March 2013.
Soojin Kim and Kyeongsoon Cho, “Efficient Pedestrian Detection Using Multi-scale HOG Features with Low Computational Complexity,” IEICE Transactions on Information and Systems, Vol. E97-D, No. 2, pp. 366-369, February 2014.
Soojin Kim and Kyeongsoon Cho, “Fast Calculation of Histogram of Oriented Gradient Feature by Removing Redundancy in Overlapping Block,” Journal of Information Science and Engineering, Vol. 30, No. 6, pp. 1719-1731, November 2014.
Soojin Kim and Kyeongsoon Cho, “Design of High-Performance HOG Feature Calculation Circuit for Real-Time Pedestrian Detection,” Journal of Information Science and Engineering, Vol. 31, No. 6, pp. 2055-2073, November 2015.
Seonyoung Lee and Kyeongsoon Cho, “ASIC Implementation of a New and Efficient Wavelet Coding Algorithm,” Proc. of the Asia-Pacific Conference on ASIC 2002, pp. 229-232, August 2002.
Seonyoung Lee and Kyeongsoon Cho, "Low-Power Real-Time Video CODEC for 16-Channel DVR Security System", Proc. of 2003 International Technical Conference on Circuits/System, Computers and Communications, pp. 268-271, July 2003.
Sungoh Kim, Seonyoung Lee and Kyeongsoon Cho,"VLSI Implementation of Lifting-Based 2D DWT Using an Efficient Scheduling Method to Reduce Memory Requirement," Proc. of 2004 International SoC Design Conference, pp. 486-489, October 2004.
Sungoh Kim, Hye Young Yang, Dong Hyun Lee, Ja Nam Ku, Il Jong Song, Young Hoon Min and Kyeongsoon Cho, "State Machine Implementation for 860MHz-930MHz Class 1 RFID Tag Chip Based on EPC Global Version 1.0 Specifications," Proc. of IT-SoC Conference 2004, pp. 425-428, October 2004.
Seonyoung Lee and Kyeongsoon Cho, “An Efficient Architecture of Area-Optimized Transform Circuit for H.264/AVC,” Proc. of 2005 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 749-750, July 2005.
Seonyoung Lee and Kyeongsoon Cho, “An Efficient Architecture of High-Performance Deblocking Filter for H.264/AVC,” Proc. of 2005 International Technical Conference on Circuits/Systems, Computers and Communications, pp. 99-100, July 2005.
Jongkeun Na, Seonyoung Lee and Kyeongsoon Cho, “An AMBA-Based IP for Transform and Quantization in H.264 Video Compression," Proc. of 2005 International SoC Design Conference, pp. 353-356, October 2005.
Seonyoung Lee and Kyeongsoon Cho, “Design and Verification of an AMBA-Compliant IP for H.264 Deblocking Filter," Proc. of 2006 International SoC Design Conference, pp. 191-194, October 2006.
Seonyoung Lee and Kyeongsoon Cho, “Implementation of an AMBA-Compliant IP for H.264 Transform and Quantization," Proc. of 2006 IEEE Asia Pacific Conference on Circuits and Systems, pp. 1073-1076, December 2006.
Seonyoung Lee and Kyeongsoon Cho, “An Area-Efficient Integrated Architecture of Transform Circuit for WMV9/MPEG-4/H.264 Video Decoder," Proc of The 22nd International Technical Conference on Circuits/Systems, Computers and Communications, pp.453-454, July 2007.
Seonyoung Lee and Kyeongsoon Cho, “Circuit Implementation for Transform and Quantization Operations for H.264/MPEG-4/VC-1 Video Decoder," Proc. of Design & Technology of Integrated Systems, pp. 106-111, September 2007.
Jaeoh Shim, Seonyoung Lee and Kyeongsoon Cho, “Architecture of Intra Prediction Circuit for H.264 Decoder Based on Basic Computation Unit," Proc. of 2007 International SoC Design Conference, pp. 451-454, October 2007.
Seonyoung Lee and Kyeongsoon Cho, “Design of Transform and Quantization Circuit for Multi-Standard Integrated Video Decoder," Proc. of IEEE Workshop on Signal Processing Systems, pp. 181-186, October 2007.
Seonyoung Lee and Kyeongsoon Cho, “High-Performance Architecture of Transform Circuit for Multi-Standard Video CODEC," Proc. of The 23rd International Technical Conterence on Circuits/Systems, Computers and Communications, pp. 181-184, July 2008.
Dongyeob Chun, Joonho Kim, Seonyoung Lee and Kyeongsoon Cho, “Design of High-Performance Unified Motion Estimation IP for H.264/MPEG-4 Video CODEC,” Proc. of 2008 International SoC Design Conference, pp. 156-159, November 2008.
Jaeoh Shim, Seonyoung Lee and Kyeongsoon Cho, “Hybrid Architecture of Full-Search Block-MatchingMotion Estimation Circuit for MPEG-4 Encoder,” Proc. of 2008 International SoC Design Conference, pp. 226-229, November 2008.
Seonyoung Lee and Kyeongsoon Cho, “Design of High-Performance Transform and Quantization Circuit for Unified Video CODEC,” Proc.of 2008 IEEE Asia Pacific Conference on Circuits and Systems, pp. 1450-1453, December 2008.
Hoyoung Chang, Soojin Kim, Seonyoung Lee and Kyeongsoon Cho, “Architecture of Sub-pixel Interpolation Circuit for H.264 Video Encoder,” Proc.of The 24th International Technical Conference on Circuits/Systems, Computers and Communications, pp. 294-297, July 2009.
Soojin Kim, Hoyoung Chang, Seonyoung Lee and Kyeongsoon Cho, “High-performance and Low-bandwidth Architecture of H.264 Motion Estimation Circuit for 1080HD Video,” Proc.of The 52nd IEEE International Midwest Symposium on Circuits and Systems,pp.1110-1113, August 2009.
Hoyoung Chang, Soojin Kim, Seonyoung Lee and Kyeongsoon Cho, “High-performance Architecture of H.264 Integer-pixel Motion Estimation IP for Real-time 1080HD Video CODEC,” Proc. of IEEE International SoC Conference, pp.419-422, September 2009.
Hoyoung Chang, Soojin Kim, Seonyoung Lee and Kyeongsoon Cho, “Design of Area-efficient Unified Transform Circuit for Multi-standard Video Decoder,” Proc. of 2009 International SoC Design Conference, pp. 369-372, November 2009.
Hoyoung Chang, Soojin Kim, Seonyoung Lee and Kyeongsoon Cho, “Design of Luma and Chroma Sub-pixel Interpolator for H.264 Fractional Motion Estimation,” Proc. of IEEE TENCON 2009, pp. TUE3.5.2:1-5, November 2009.
Soojin Kim, Hoyoung Chang, Seonyoung Lee and Kyeongsoon Cho, “VLSI Design to Unify IDCT and IQ Circuit for Multi-standard Video Decoder,” Proc. of IEEE 12th International Symposium on Integrated Circuits, pp. 328-331, December 2009.
Soojin Kim and Kyeongsoon Cho, “Design of 2.5Gb/s non-PLL-type All-Digital Clock Recovery Circuit,” Proc. of 2010 International SoC Design Conference, pp. 416-419, November 2010.
Gyun Park and Kyeongsoon Cho, “MPW Implementation of Integer-pixel Motion Estimation Circuit for 1080HD Video Encoder,” Proc. of 2010 International SoC Design Conference, pp. 436-439, November 2010.
Hoyoung Chang and Kyeongsoon Cho, “High-Performance Inverse Transform Circuit Based on Butterfly Architecture for H.264 High Profile Decoder,” Proc. of 2010 IEEE Asia Pacific Conference on Circuits and Systems, pp. 394-397, December 2010.
Soojin Kim and Kyeongsoon Cho, “Design of High-speed Clock Recovery Circuit for Burst-mode Applications,” Proc. of 2011 IEEE International Symposium on Circuits and Systems, pp. 177-180, May 2011.
Soojin Kim, Seonyoung Lee and Kyeongsoon Cho, “Design of High-performance Unified SVM Classifier,” Proc. of The 26th International Technical Conference on Circuits/Systems, Computers and Communications, pp. 146-148, June 2011.
Sangkyun Park, Seonyoung Lee, Soojin Kim and Kyeongsoon Cho, “Design of AdaBoost Classifier Circuit using Haar-like Features for Automobile Applications,” Proc. of 2011 International SoC Design Conference, pp. 262-265, November 2011.
Soojin Kim, Seonyoung Lee, Kyoungwon Min and Kyeongsoon Cho, “Design of Support Vector Machine Circuit for Real-time Classification,” Proc. of 2011 International Symposium on Integrated Circuits, pp. 394-397, December 2011.
Soojin Kim, Seonyoung Lee, Kyoungwon Min and Kyeongsoon Cho, “Design of Unified Support Vector Machine Circuit for Pedestrians and Cars Detection,” Proc. of 10th IEEE International NEWCAS Conference, pp. 45-48, June 2012.
Soojin Kim, Seonyoung Lee and Kyeongsoon Cho, “Design of High-speed Support Vector Machine Circuit for Driver Assistance System,” Proc. of 2012 International SoC Design Conference, pp. 45-48, November 2012.
Soojin Kim, Sangkyun Park, Seonyoung Lee, Seungsang Park and Kyeongsoon Cho, “Design of High-performance Pedestrian and Vehicle Detection Circuit Using Haar-like Features,” Proc. of IEEE TENCON 2012, 1569607555,pp. 1-5,November 2012.
Hojin Kim, Soojin Kim and Kyeongsoon Cho, “Compact Architecture of Encryption Circuit Based on AES Algorithm,” Proc. of The 28th International Technical Conference on Circuits/Systems, Computers and Communications, pp. 278-280,July 2013.
Soojin Kim and Kyeongsoon Cho, “Trade-off between Accuracy and Speed for Pedestrian Detection using HOG Feature,” Proc. of The 3rd IEEE International Conference on Consumer Electronics – Berlin, pp. 207-209, September 2013.
Soojin Kim, Jaeho Shin, Seonyoung Lee and Kyeongsoon Cho, “Design of AMBA-compliant Image Scaler Circuit for Low Bus Bandwidth,” Proc. of 2013 International Conference on Information Engineering, November 2013.
Soojin Kim, Hojin Kim, Seonyoung Lee and Kyeongsoon Cho, “Design of High-performance Unified Image Scaler Circuit for Real-time Object Detection,” Proc. of 10th International Conference on Electronics, Computer and Computation, pp. 382-385, November 2013.