SMDP-C2SD - PUBLICATIONS

Patent:

Vishal Sharma and S. K. Vishvakarma, “An Ultra-Low-Power, read decoupled-differential write 10T SRAM cell with larger read/write noise margin", Patent Application no. 201621033995, Filed: 4th October 2016, Published: 6th April 2018, Patent no. 358866, Granted: 19th February 2021. [Certificate]
Bhupendra Reniwal and S. K. Vishvakarma, "Offset Compensated Data Sensing Technique for Low Energy Embedded RAM", Patent Application no. 201621034132, Filed: 5th October 2016, Published: 6th June 2018.

Journal Publications:

Gunjan Rajput, Sashank Agrawal, Gopal Raut and Santosh Kumar Vishvakarma, “An Accurate and Non-Invasive Screening of Skin Cancer Based on the Imaging Technique ”, International Journal of Imaging System and Technology, Wiley. (Accepted)
Sajid Khan, Ambika Prasad Shah, Shailesh Singh Chouhan, Jai Gopal Pandey, and Santosh Kumar Vishvakarma, “A D Flip-flop based TRNG with Zero Hardware Cost for IoT Security Applications”, Elsevier, Microelectronics Reliability, Volume 120, May 2021. [PDF]
Gunjan Rajput, Gopal Raut, Mahesh Chandra, and Santosh Kumar Vishvakarma, “VLSI implementation of Transcendental Function-Hyperbolic Tangent for a Neural Network Accelerators”, Elsevier, Microprocessor and Microsystem, April 2021. [PDF]
Neha Gupta, Ambika Prasad Shah, and Santosh Kumar Vishvakarma. “BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger Circuit”, IEEE Transactions on Device and Materials Reliability, Volume 21, Issue 1, March 2021 . [PDF]
Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, and Akash Kumar. “RECON: Resource-efficient CORDIC-based neuron architecture”, IEEE Open Journal of Circuits and Systems, Page no. 170-181, February 2021. [PDF]
Neha Gupta, Ambika Prasad Shah, Rana Sagar Kumar, Gopal Raut, Narendra Singh Dhakad, and Santosh Kumar Vishvakarma, “Soft Error Hardened Voltage Bootstrapped Schmitt Trigger Design for Reliable Circuits” Microelectronics Reliability, Elsevier, Volume 117, February 2021 . [PDF]
Vishal Sharma, Neha Gupta, Ambika Prasad Shah, Santosh Kumar Vishvakarma & Shailesh Singh Chouhan, “A reliable, multi-bit error tolerant 11T SRAM memory design for wireless sensor nodes”, Analog Integrated Circuits and Signal Processing, 107, pages 339–352(2021). [PDF]
Neha Gupta, Ambika Prasad Shah, Rana Sagar Kumar, Sajid Khan, and Santosh Kumar Vishvakarma, “On Chip Adaptive VDD Scaled Architecture of Reliable SRAM Cell with Improved Soft Error Tolerance”, IEEE Transactions on Device and Materials Reliability, Aug. 2020 [PDF].
Neha Gupta, Vishal Sharma, Ambika Prasad Shah, Sajid Khan, Michael Huebner, Santosh Kumar Vishvakarma, “An Energy-Efficient Data-Dependent Low-Power 10T SRAM Cell Design for LiFi Enabled Smart Street Lighting System Application,” International Journal of Numerical Modeling: Electronic Networks, Devices and Fields, Willey, pp. 2766, volume 33, issue 6, June 2020 [PDF].
Sajid Khan, Ambika Prasad Shah, Shailesh Singh Chouhan, Sudha Rani, Neha Gupta, Jai Gopal Pandey, Santosh Kumar Vishvakarma, “Utilizing Manufacturing Variations to Design A Tri-State Flip-flop PUF for IoT Security Applications,” Analog Integrated Circuits and Signal Processing, Springer, April 2020 [PDF].
Ambika Prasad Shah, Daniele Rossi, Vishal Sharma, Santosh Kumar Vishvakarma, and Michael Waltl, “Soft Error Hardening Enhancement Analysis of NBTI Tolerant Schmitt Trigger Circuit”, Microelectronics Reliability, Elsevier, vol. 107, pp. 113617, April 2020 [PDF].
Ambika Prasad Shah, Santosh Kumar Vishvakarma, and Michael Huebner, “Soft Error Hardened Asymmetric 10T SRAM Cell for Aerospace Applications”, Springer Journal of Electronic Testing: Theory and Applications, vol. 36, no. 2, pp. 1-11, April 2020 [PDF].
Sajid Khan, Ambika Prasad Shah, Shailesh Singh Chouhan, Neha Gupta, Jai Gopal Pandey, and Santosh Kumar Vishvakarma, "A Symmetric D flip-flop based PUF with improved uniqueness", Elsevier, Microelectronics Reliability, vol. 106, pp. 113595, March 2020 [PDF].
Gopal Raut, Ambika Prasad Shah, Vishal Sharma, Gunjan Rajput, and Santosh Kumar Vishvakarma, "A 2.4-GS/s Power-Efficient, High-Resolution Reconfigurable Dynamic Comparator for ADC Architecture", Springer, Circuits, Systems, and Signal Processing, pp. 1-14, Feb. 2020 [PDF].
Ambika Prasad Shah, Santosh Kumar Vishvakarma and Sorin Cotofana, “NBTI Stress Delay Sensitivity Analysis of Reliability Enhanced Schmitt Trigger-based Circuits”, Elsevier, Microelectronics Reliability, Volume 102, November 2019 [PDF].
Sajid Khan, Ambika Prasad Shah, Neha Gupta, Shailesh Singh Chouhan, Jai Gopal Pandey, and Santosh Kumar Vishvakarma, ”An Ultra-Lightweight Low Power Reconfigurable NBTI Resilient RO-PUF for IoT Applications”, Microelectronics Journal, Elsevier, Volume 92, October 2019. [PDF].
Pooja Bohara and Santosh Kumar Vishvakarma, "NAND Flash Memory Device with Ground Plane in Buried Oxide for Reduced Short Channel Effects and Improved Data Retention," Journal of Computational Electronics, Springer, Issues 2, Jan 2019 [PDF].
Mahesh Kumawat, Mohit Singh Choudhary, Ravi Kumar, Gaurav Singh, Santosh Kumar Vishvakarma, "A Novel CML Latch Based Wave Pipelined Asynchronous SerDes Transceiver for Low Power Application", Journal of Circuits, Systems, and Computers, World Scientific, Volume 29, No. 7. [PDF].
Mahesh Kumawat, Abhishek Kumar Upadhyay, Sanjay Sharma, Ravi Kumar, Gaurav Singh, and Santosh Kumar Vishvakarma, “An Improved Current Mode Logic Latch for High-Speed Applications”, International Journal of Communication System Wiley, July 2019 [PDF].
Vishal Sharma, Prashu Bisht, Abhishek Dalal, Maisagalla Gopal, Santosh Kumar Vishvakarma, and Shailesh Singh Chouhan, “Half-select free bit-line sharing 12T SRAM with double-adjacent bits soft error correction and a reconfigurable FPGA for low-power applications”, International Journal of Electronics and Communications, Elsevier, Vol. 104, pp. 10-22, May 2019 [PDF].
Ambika Prasad Shah and Santosh Kumar Vishvakarma, “An Energy-Efficient 8-Transistor Full Adder Cell-Based on Degenerate Pass Transistor Logic”, IEEE VLSI Circuits and Systems Letter, Vol. 5, No. 2, pp. 1-6, May 2019 [PDF].
Mahesh Kumawat, Abhishek Dalal, Mohit S. Chaudhary, Ravi Kumar, Gaurav Singh and Santosh Kumar Vishvakarma, "Wave Combining Driver based Serial Data Link Transceiver Design for Multi-Standard Applications," Journal of Nanoelectronics and Optoelectronics (JNO), ASP, Volume 14, Number 5, pp. 675-679(5), May 2019 [PDF].
Pooja Bohara and Santosh Kumar Vishvakarma, "Self-Amplified Tunneling Based SONOS Flash Memory Device with Improved Performance", IEEE Transactions on Electron Devices, vol. 65, issues 19, pp. 4297 - 4303, Aug 2018 [PDF].
Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar, Santosh Kumar Vishvakarma, "SUBHDIP: Process Variations Tolerant Subthreshold Darlington Pair Based NBTI Sensor Circuit," IET Computers & Digital Techniques, Sept 2018 [PDF].
Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar and Santosh Kumar Vishvakarma, “Process Variation and NBTI Resilient Schmitt Trigger for Stable and Reliable Circuits,” IEEE Transactions on Device and Materials Reliability, vol. 16, issue 4, pp. 546-554, Dec 2018. [PDF]
Bhupendra Singh Reniwal, Vikas Vijayvargiya, Pooran Singh Reniwal, Nandkishor Yadav, Santosh Kumar Vishvakarma and Devesh Dwivedi, "An Auto Calibrated Sense Amplifier with Offset Prediction Approach for Energy Efficient SRAM, "Circuits, Systems & Signal Processing (CSSP), Springer, Aug. 2018 [PDF].
Vishal Sharma, Maisagalla Gopal, Pooran Singh, S. K. Vishvakarma and Shailesh Singh Chouhan, “A Robust, Ultra Low-Power, Data-Dependent-Power-Supplied 11T SRAM Cell with Expanded Read/Write Stabilities for Internet-of-Things Applications,” Analog Integrated Circuits and Signal Processing, Springer, pp 1-16, Aug, 2018. [PDF].
Vishal Sharma, Santosh Kumar Vishvakarma, Shailesh Singh Chouhan and Kari Halonen, “A Write-Improved Low-Power 12T SRAM Cell for Wearable Wireless Sensor Nodes" International Journal of Circuit Theory and Applications, Wiley, Aug, 2018 [PDF].
Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar, Santosh Kumar Vishvakarma, "An Efficient NBTI Sensor and Compensation Circuit for Stable and Reliable SRAM Cells," Microelectronics Reliability, Elsevier, Vol. 87, pp 15-23, August 2018 [PDF].
Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar and Santosh Kumar Vishvakarma, "NMOS Only Schmitt Trigger Circuit for NBTI Resilient CMOS Circuits," IET Electronics Letter, Vol. 54 No. 14 pp. 868–870, July 2018 [PDF].
Pooran Singh and Santosh Kumar Vishvakarma, "Ultra Low Power-High Stability, Positive Feedback Controlled (PFC) 10T SRAM cell for Lookup Table (LUT) Design, "Integration, the VLSI Journal, vol 62, pp 1-13, June 2018 [PDF].
Vishal Sharma, Maisagalla Gopal, Pooran Singh, and Santosh Kumar Vishvakarma, “A 220 mV Robust Read-Decoupled Partial Feedback Cutting based Low-Leakage 9T SRAM for Internet of Things (IoT) Applications,” International Journal of Electronics and Communications, Elsevier, vol. 87, pp. 144-157, April 2018. [PDF]
Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar, and Santosh Kumar Vishvakarma, “On-chip Adaptive Body Bias for Reducing the Impact of NBTI on 6T SRAM Cells,” IEEE Transactions on Semiconductor Manufacturing, vol. 31, issue 2, pp. 242-249, May 2018 [PDF].
Pooran Singh and Santosh Kumar Vishvakarma, " Ultra-Low Power High Stability 8T SRAM for Application in Object Tracking System", IEEE Access, Vol. 6, pp. 2279 - 2290, 2018 [PDF].
Pooran Singh and S. K. Vishvakarma, “Ultra low power process tolerant 10T (PT10T) SRAM with improved read/write ability for internet of things (IoT) applications," Journal of Low Power Electronics and Applications, vol. 7, no. 3, 24, pp. 1-22, Sept. 2017 [PDF].
Pooran Singh and S. K. Vishvakarma “Low Complexity-Low Power Object Tracking Using Dynamic Quad-tree Pixelation and Macro-block Resizing,” Pattern Recognition and Image Analysis, Springer, vol 27, issue 4, pp 731-739, Oct 2017. [PDF]
Nandakishor Yadav, Ambika Prasad Shah and Santosh Kumar Vishvakarma, " Stable, Reliable and Bit-Interleaving 12T SRAM for Space Applications: A Device Circuit Co-design," IEEE Transactions on Semiconductor Manufacturing, issue 99, June 2017. [PDF]
Pooran Singh, B. S. Reniwal, V. Vijayvargiya, Vishal Sharma and S. K. Vishvakarma," Dynamic Feedback-Controlled Static Random Access Memory for Low Power Applications", Journal of Low Power Electronics, Vol. 13, No. 1, pp. 47-59 (13), March 2017, ASP, USA. [PDF]
B. S. Reniwala, Praneet Bhatiab and S. K. Vishvakarma, "Design and Investigation of Variability Aware Sense Amplifier for Low Power, High-Speed SRAM, " Microelectronics Journal, Elsevier, Vol. 59, pp. 22-32, Jan 2017. [PDF]
C. B. Kushwah, S. K. Vishvakarma and D. Dwivedi, "A 20nm Robust Single-Ended Boost-Less 7T FinFET Sub-threshold SRAM Cell under Process-Voltage-Temperature Variation, "Microelectronics Journal, Elsevier, Vol. 51, pp. 75-88, May 2016. [PDF]
C. B. Kushwah and S. K. Vishvakarma, "A Single-Ended with Dynamic Feedback Control 8T Sub-Threshold SRAM Cell", IEEE Transactions on Very Large Scale Integration (VLSI), Systems, issue 1, Vol. 24, pp. 373-377, Jan 2016. [PDF]
C. B. Kushwah, S. K. Vishvakarma and D. Dwivedi, “Single-Ended Boost-Less (SE-BL) 7T Process Tolerant SRAM Cell Design in Sub-Threshold Regime for Ultra-Low Power Applications”, Circuits, Systems & Signal Processing (CSSP), Springer, no. 2, vol. 35, pp. 385-407, Feb. 2016. [PDF]
Bhupendra Singh Reniwal, Vikas Vijayvargiya, S. K. Vishvakarma, Devesh Dwivedi, “Ultra-Fast Current Mode Sense Amplifier for Small ICELL SRAM in FinFET with Improved Offset Tolerance", Circuits, Systems & Signal Processing (CSSP), Springer, pp 1-20, Nov. 2015. [PDF]
C. B. Kushwah, S. K. Vishvakarma, and D. Dwivedi, “A boost-less write optimized single-ended robust 7T SRAM cell for ultra-low-power memory design”, International Journal of Electronics Letters (IJEL), Taylor Francis, Sept. 2015. [PDF]

Conference Publications:

Neha Gupta, Nikhil Agrawal, Narendra Singh Dhakad, Ambika Prasad Shah, Santosh Kumar Vishvakarma and Patrick Girard , "Voltage Bootstrapped Schmitt Trigger based Radiation Hardened Latch design for Reliable Circuits ", In Proceedings of the 2021 on Great Lakes Symposium on VLSI, 22-25 June 2021, pp. 307–312.
Raut, Gopal, Shubham Rai, Santosh Kumar Vishvakarma, and Akash Kumar, "A CORDIC based Configurable Activation Function for ANN Applications", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 78-83, 2020. (Nominee for Best Paper Award) [PDF]
Gunjan Rajput, Gopal Raut, Sajid Khan, Neha Gupta, Santosh Kumar Vishvakarma, “ASIC Implementation of Biological Inspired Spiking Neural Network”, Conference ICETET (ICETET-2019).
Vishal Sharma, Pranshu Bisht, Abhishek Dalal, Shailesh Singh Chouhan, H. S. Jattana and Santosh Kumar Vishvakarma, “A Write-Improved Half-Select-Free Low-Power 11T Subthreshold SRAM with Double Adjacent Error Correction for FPGA-LUT Design” 22nd Symposium on VLSI Design and Test, Madurai, India June 28-30, 2018.
Bhupendra Reniwal and S. K. Vishvakarma, " Variability Aware Design of Energy Efficient SRAM in Conventional & Non-Conventional MOS Technologies: A Sense Amplifier Perspective" 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, Pune, India, Jan 8-10, 2018.
Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar and S. K. Vishvakarma, "On-Chip NBTI Sensor Circuits for Stable and Reliable CMOS Circuits, "31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, Pune, India, Jan 8-10, 2018.
Abhishek Upadhyay, Ajay Kushwaha and S.K.Vishvakarma, "Modified Quasi Ballistic Transport Model for Graphene FET Simulation," 19th International Workshop on Physics of Semiconductor Devices (IWPSD), SSPL Delhi & IIT Delhi, Dec. 2017.
Pooja Bohara and S.K.Vishvakarma, "Independent Gate Operation of NAND Flash Memory Device with Improved Retention Characteristics," 19th International Workshop on Physics of Semiconductor Devices (IWPSD), SSPL Delhi & IIT Delhi, Dec. 2017.
Ankur Beohar, Ambika Prasad Shah, Nandakishor Yadav, and Santosh Kumar Vishvakarma, "Design of 3D Cylindrical GAA-TFET Based on Germanium Source with Drain Underlap for Low Power Applications,” IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC 2017) at National Tsing Hua University, Hsinchu, Taiwan, October 18th to 20th, 2017.
Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar and Santosh Kumar Vishvakarma, "Subthreshold Darlington Pair Based NBTI Sensor for Reliable CMOS Circuits, " IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC 2017) at National Tsing Hua University, Hsinchu, Taiwan, October 18th to 20th, 2017.
Pooran Singh, Bhupendra Reniwal, Vikas Vijayargiya, Vishal Sharma and S. K.Vishvakarma, "A 9T SRAM for ultra-low power applications", 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 7th-11th Jan 2017, Hyderabad, India.
Bhupendra Reniwal, Pooran Singh, Vikas Vijayvargiya and S. K. Vishvakarma, "A New Sense Amplifier Design with Improved Input Referred Offset Characteristics for Energy-Efficient SRAM", 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 7th-11th Jan 2017, Hyderabad, India.

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