ASIC-I: Low Power SRAM Design

• The major objective of this project would be to design and develop an SRAM chip with high speed and low power consumption.

• The designed SRAM will be utilized for Digital Signal Processor (DSP) module to be use in health monitoring system project.

• Further, the designed SRAM can be utilized for data buffer to send/store the information over internet using WiFi module available on IoT board for health monitoring system.

• Finally, the designed SRAM can be utilized as an important IP in the relevant circuit and system to be used in space application, IoT enabled smart energy system, smart automobile system, industrial automation etc.

ASIC-II: 8b/10b encoding and decoding

• Design and development of 8b/10b encoder and decoder with Power optimization.

• The designed encoder & decoder will be used in High Speed Serial link transceivers.

• Designed ASIC can be utilized for the Gigabit Ethernet applications.