A. 期刊論文
Shu-Chung Yi, "A 10-bit current-steering CMOS digital to analog converter," International Journal of Electronics and Communications, 69, pp. 14–17, 2015. [SCI&EI]
Shu-Chung Yi, Chin-Fa Hsieh, “An arithmetic controller design for numerical control,” Computers and Electrical Engineering, 39, 2045–2052, 2013. [SCI&EI]
Shu-Chung Yi, “ Low-Power Temperature Sensor with Complementary Metal Oxide Semiconductor Circuits,” Sensors and Materials, Vol. 25, No. 6, 2013, pp. 341–346. [SCI&EI]
Shu-Chung Yi, Zhi-Ming Lin, Po-Yo Kuo and Hsin-Chi Lai, “ CMOS Driver for Heavy-Load Flat-Panel Scan-Line Circuit Based on Complementary Dual-Bootstrap,” IEICE Transaction on Electronics, Vol.E96-C,No.11,pp. 1399- 1403, Nov. 2013. [SCI&EI]
Shu-Chung Yi, “A Low Power CMOS Temperature Sensor,” Applied Mechanics and Materials, Vol. 284, 2013, pp. 1729 - 1733. [SCI&EI]
Shu-Chung Yi, “ An 8-bit current-steering digital to analog converter, ” AEU - International Journal of Electronics and Communications, No. 66, 2012, pp. 433 - 437. [SCI&EI]
Shu-Chung Yi,” A 6-bit Digital to Analog Converter Based on Current Mirrors,” International Journal of Electronics. Vol. 99, No. 9, 2012, 1291–1298. [SCI&EI]
Shu-Chung Yi, “ A new construction adder based on Chinese abacus algorithm, ” Computers and Electrical Engineering, Vol. 38, pp. 185–193, 2012. [SCI&EI]
Shu-Chung Yi, "A direct digital frequency synthesizer based on ROM free algorithm," International Journal of Electronics and Communications, 64(2010), pp. 1068–1072. [SCI&EI]
Shu-Chung Yi, Jin-Jia Chen, Chien-Hung Lin and Kun-Tse Lee, “A Low-power direct digital frequency synthesizer,” International Journal of Electronics, Vol. 95, Issue 6, January 2008, pp. 593 – 599. [SCI&EI]
B. 研討會論文
C.-J. Chen, S. –C. Yi, H. –H. Hsu, and W. Lin, “Large-scale Circuit Simulation by using Selective-tracing Waveform Relaxation and Nonlinear Relaxation,” International Workshop on Compact Modeling, pp. 50 – 55, January 27, 2004.
Chun-Jung Chen, Shu-Chung Yi, Hui-Huang Hsu, and Weishing Lin, “Large-scale Circuit Simulation by using Composition of Waveform Relaxation and Iterated Timing Analysis Algorithms,” Design, Test, Integration and Packaging of MEMS/MOEMS 2004, pp. 167 - 172, 12-14 May 2004.
Chuen-Ching Wang, Yih-Chuan Lin, and Shu-Chung Yi, “Satellite Interference Detection Using Real-TimeWatermarking Technique for SMS,” IEEE Proceedings of the Third International Conference on Information Technology and Applications, pp. 238 - 241, 4th~7th July, 2005. [EI]
Shu-Chung Yi, Kun-Tse Lee, Chien-Hung Lin, Chuen-Ching Wang, Mao-Hsu Yen, “High Radix Chinese Abacus Adders,” 2005年民生電子暨信號處理研討會, p. 91, Nov. 17-18, 2005.
Su-Chung Yi, Kun-Tse Lee, Jin-Jia Chen, Chien-Hung Lin, Chuen-Ching Wang, Chin-Fa Hsieh, Chih-Yun Lu, “The new architecture of radix-4 Chinese abacus adder,” IEEE Proceedings of The International Symposium on Multiple-Valued Logic, Singapore, May 17 - 20, 2006. [EI]
Su-Chung Yi, Kun-Tse Lee, Jin-Jia Chen, Chien-Hung Lin, “A Low-Power Efficient Direct Digital Frequency Synthesizer based on New Two-Level Lookup Table,” IEEE Canadian Conference on Electrical and Computer Engineering, pp. 963 – 966, Ottawa, May 7 to 10, 2006. [EI]
Yi-Chieh Lin, Lin, Chien-Hung Lin, Zi-Yi Zhao, Yu-Zhi Xie, and Yen-Ju Chen, and Shu-Chung Yi," A novel high speed Chinese abacus multiplier," International MultiConference of Engineers and Computer Scientists, pp.510 – 513, Hong Kong, 21-23, March, 2007.
Shu-Chung Yi, Zi-Yi Zhao, Chien-Hung Lin, Yu-Zhi Xie, Yen-Ju Chen, Yi-Jie Lin, "The novel Chinese abacus adder," IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), pp. 270–273, Ambassador Hotel, Hsinchu, Taiwan, April 25-27, 2007. [EI]
Shun-He Huang, Chien-Hung Lin, Shu-Chung Yi and Jin-Jia Chen, “A Chinese abacus DAC for Video application,” 2007 Third IEEE International Conference on Intelligent Information Hiding and Multimedia Signal Processing, pp. 507-510, Kaohsiung, Taiwan 26-28 November 2007. [EI]
De-Ji Liu, Chien-Hung Lin, Shu-Chung Yi and Jin-Jia Chen, “A resister string DAC for Video application,” 2007 Third IEEE International Conference on Intelligent Information Hiding and Multimedia Signal Processing, pp. 503-506, Kaohsiung, Taiwan 26-28 November 2007. [EI]
Chin-Fa Hsieh, Tsung-Han Tsai, Chih-Hung Lai, Shu-Chung Yi, Mao-Hsu Yen, “Implementation of an Efficient DWT Using a FPGA on a Real-time Platform,” 2007 IEEE Second International Conference on Innovative Computing, Information and Control, pp. 235 - 235, 5-7 Sept. 2007. [EI]
Chang-Pei Yi, Hsin-Hong Chen, Yeong-Chin Chen, "A Smart Meter Design Implemented with IOT Technology," 2018 International Symposium on Computer, Consumer and Control, pp.360-363, 2018. [EI]
C. Patents
US6611439: Ta-yung Yang, Jenn-yu G Lin, Shu-chung Yi, “PWM controller for controlling output power limit of a power supply,” August 26, 2003.
TWI315813 專利名稱: 應用於直接式數位頻率合成裝置之二階查表演算法,發明人: 易昶霈,李坤澤,葉宇智,趙子儀,林建宏,陳彥如。
TWI332174 專利名稱: 中國式算盤加法器,發明人: 易序忠,趙子儀,葉宇智,陳彥如,林義傑,林建宏。
TWI365405 專利名稱: 二進位編碼的十進位數之加法器,發明人:易序忠,林建宏,張世勳。
TWI394377 專利名稱: 算盤式數碼轉換器、轉換單元及其製造方法,發明人: 易昶霈,謝博元,黃韋富。
TWI387736 專利名稱: 操作於次臨界區之低功率溫度感測器,發明人: 易昶霈,陳鴻鑫,謝慶發。
TWM300338 專利名稱: 利用算盤運算原理之加法器電路,創作人: 謝慶發, 易昶霈