Assistant Professor
Department of Computer Science and Engineering
Indian Institute of Technology, Bombay
Office: CC-215, Department of Computer Science and Engineering, Indian Institute of Technology Bombay, India
Email: sayandeepsaha@cse.iitb.ac.in, sayandeep.iitkgp@gmail.com
Ph (Office): 7134
Research Group: SHarC
Check our research group: SHarC
I am an Assistant Professor in the Department of Computer Science and Engineering, Indian Institute of Technology Bombay. Before joining IIT Bombay, I spent two wonderful years of postdoctoral research at NTU Singapore (Jan 2022 - Jan 2023; with Professor Thomas Peyrin) and UCLouvain Belgium (Feb 2023 - March 2024; with Professor François-Xavier Standaert). I completed my PhD from the Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur (Jul 2016 - Sep 2021) under the supervision of Professor Debdeep Mukhopadhyay and Professor Pallab Dasgupta.
My primary area of research is Hardware Security and Cryptography. In my Ph.D. and postdoctoral research, I have worked on Fault Attacks for Symmetric-key cryptosystems and Post-Quantum public-key cryptosystems. I also work on Side-Channel attacks and other aspects of Hardware Security, such as microarchitectural attacks, Logic Locking, etc.
Besides my research, I spend most of my leisure time reading books and travelling.
I am actively looking for interested and motivated students. Please feel free to drop me an email if you are interested in my research area. Students from Electrical and Electronics backgrounds are also encouraged. I am especially looking for people with hardware design expertise. But that is just one area and not all. So please connect if you are interested.
** I am looking for students in microarchitectural attacks, side-channel, or fault attacks, and Post-Quantum Cryptography. Please drop me an email if you are interested. For details on this topic, please take a look here. Alternatively, you can also browse through the accepted paper lists in the top conferences and journals: TCHES, IEEE TIFS, IEEE TC, IEEE TCAD, IEEE TDSC, ACM-CCS, S&P, EUROCRYPT, ASIACRYPT, CRYPTO, ToSC, DATE, DAC, ICCAD, HOST, HPCA.
** The entry process into PhD and MS programs is through qualifiers organized twice a year. Please check the CSE IITB webpage for the dates. However, if you are interested in doing research under my supervision, please email me beforehand with your CV and list of expertise.
News
26th Jan 2025: Our paper, "Fault Template Attacks on Block Ciphers Exploiting Fault Propagation" from EUROCRYPT 2020 has been crowned as "Top Picks in Hardware and Embedded Security 2024". Top Picks recognizes the best of the best in hardware security.
25th Jan 2025: Our paper "Systematic Evaluation of Randomized Cache Designs against Occupancy Attack" has been accepted at USENIX Security 2025.
19th December 2024: The website for "Implementation Security in Cryptography" is up!! The course will be offered in slot 6 in the coming semester. The timings are 11:05 -- 12:30 am (Wed and Fri). Interested students, please register!!! The course is open to CSE and EE students.
27th July 2024: I am co-teaching the Digital Logic and Computer Architecture Theory + Lab course. Please refer to this page for resources on the digital logic module.
15th July 2024: Delighted to share that I am a member of CHES PC this year!!! Please consider submitting
15th June 2024: Our paper entitled "Prime Masking vs. Faults - Exponential Security Amplification against Selected Classes of Attacks." got accepted at CHES 2024. This is the second paper that got accepted to CHES this year!!! The links are here: paper1, paper2.
15th May 2024: Finished Reviewing for USENIX Security 2024. I was a PC member this year.
10th April 2024: Joined the Department of Computer Science and Engineering at IIT Bombay. Feeling excited!!
