Stability Analysis of Single-Port Reflection Amplifier
A reflection amplifier is a device that reflects an amplified output signal back through the same input port. Traditional stability tests, such as unconditional stability and their derivatives (e.g., the 𝐾−Δ test), do not apply to reflection amplifiers. Therefore, additional research is necessary to design a robust reflection amplifier and an active Reconfigurable Intelligent Surface. To thoroughly understand stability and prevent oscillation, I employed Barkhausen's criterion, multiple reflection analysis, pole-zero analysis, and network analysis.
Patch Antenna Design and Measurement
I designed a 9.8GHz microstrip patch antenna, progressing from CST simulation to Eagle CAD layer design and performance measurement. I possess a strong understanding of the trade-offs involved in antenna gain, power efficiency, size, reflection coefficient, surface current, and other key factors. Alongside my experience in antenna engineering, I have also completed courses in microwave and optics experiments, equipping me with proficiency in using VNAs, signal generators, and various other microwave devices.
Viterbi Algorithm
I completed a project on the Viterbi hard and soft decoding algorithms, focusing on the design of a communication system that encompasses channel encoding/decoding and modulation/demodulation for channel estimation. The project employed various modulation constellations, including BPSK and 64QAM. Key metrics such as log-likelihood ratio (LLR), bit error rate (BER), and block error rate (BLER) were used to assess the system's performance.
Operational Amplifier Design
I designed a rudimentary operational amplifier using PSPICE. The design process incorporated essential techniques, including a differential amplifier for minimizing noise, a current mirror for biasing, and feedback to ensure desired bandwidth. Stability and phase margin were carefully analyzed to prevent oscillations, with Miller compensation.
FPGA: Eagle-Run Game Design
I have developed a complete game using the Pynq-Z2 FPGA board. Throughout the project, I primarily used Verilog (with Vivado) and C (via Vitis) for I/O control. I implemented digital FIR/IIR filter design based on z-transform principles, incorporated Finite State Machine (FSM) concepts for smooth game transitions, and utilized the AMBA protocol for managing sound effects.
Image Reference
Operation Amplifier Design is from the Electronic Circuit 2 (Prof. Byung-wook Min) Spring 2023 Project Announcement
Viterbi Algorithm is from the Communication Systems (Prof. Jeonghun Park) Fall 2023 Lecture Note
FPGA is from https://www.amd.com/ko/corporate/university-program/aup-boards/pynq-z2.html
Others are produced or taken by Sang Yun Han.