Akiko Inoue, Kazuhiko Minematsu, Rei Ueno, and Naofumi Homma, “How to Implement Authenticated Encryption on XTS-Enabled Devices,” IACR Transactions on Symmetric Cryptology, 2025(4), pp. 167–198, 2025. (presented at FSE 2026)
Rei Ueno, Akira Ito, Yosuke Todo, Akiko Inoue, Kazuhiko Minematsu, Hibiki Ishikawa, and Naofumi Homma, “All You Need is XOR-Convolution: A Generalized Higher-Order Side-Channel Attack with Application to XEX/XE-based Encryptions,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2025(3), pp. 317–360, 2025. (presented at CHES 2025)
Akira Ito, Rei Ueno, and Naofumi Homma, “Perceived Information Revisisted II: Information-Theoretical Analysis of Deep-learning Based Side-Channel Attacks,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2025(1), pp. 450–474, 2024. (presented at CHES 2025)
Soichiro Kobayashi, Rei Ueno, Yosuke Todo, and Naofumi Homma, “Side-Channel Linearization Attack on Unrolled Trivium Hardware,” IACR Communications in Cryptology, 1(3), 2024.
Rei Ueno, Naofumi Homma, Akiko Inoue, and Kazuhiko Minematsu, “Fallen Sanctuary: A Higher-Order and Leakage-Resilient Rekeying Scheme,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2024(1), pp. 264–308, 2023. (presented at CHES 2024)
Katsumi Ebina, Rei Ueno, and Naofumi Homma, “Side-Channel Analysis Against SecOC-Compliant AES-CMAC,” IEEE Transactions on Circuits andSystems II: Express Briefs, 70(10), pp. 3772–3776, 2023. (presented at ISICAS 2023)
Yutaro Tanaka, Rei Ueno, Keita Xagawa, Akira Ito, Junko Takahashi, and Naofumi Homma, “Multiple-Valued Plaintext-Checking Side-Channel Attacks on Post-Quantum KEMs,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2023(3), pp.473–503, 2023. (presented at CHES 2023)
Rei Ueno and Naofumi Homma, “How Secure is Exponent-blinded RSA–CRT with Sliding Window Exponentiation?,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2023(2), pp.241–269, 2023. (presented at CHES 2023)
Ryusuke Koseki, Akira Ito, Rei Ueno, Mehdi Tibouchi, and Naofumi Homma, “Homomorphic Encryption for Stochastic Computing,” Journal of Cryptographic Engineering, 13, pp. 251–263, 2023.
Kotaro Saito, Akira Ito, Rei Ueno, and Naofumi Homma, “One Truth Prevails: A Deep-learning Based Single-Trace Power Analysis on RSA--CRT with Windowed Exponentiation,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(4), pp.490–526, 2022. (presented at CHES 2022)
Akira Ito, Rei Ueno, and Naofumi Homma, “Perceived Information Revisited: New Metrics to Evaluate Success Rate of Side-Channel Attacks,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(4), pp.228–254, 2022. (presented at CHES 2022)
Akiko Inoue, Kazuhiko Minematsu, Maya Oda, Rei Ueno, and Naofumi Homma, “ELM: A Low-Latency and Scalable Memory Encryption Scheme,” IEEE Transactions on Information Forensics and Security, 17, pp. 2628–2643, 2022.
Ayano Nakashima, Rei Ueno, and Naofumi Homma, “AES S-Box Hardware with Efficiency Improvement Based on Linear Mapping Optimization,” IEEE Transactions on Circuits and Systems II: Express briefs, 69(10), pp. 3978–3982, 2022. (presented at ISICAS 2022)
Rei Ueno, Keita Xagawa, Yutaro Tanaka, Akira Ito, Junko Takahashi, and Naofumi Homma, “Curse of Re-encryption: A Generic Power/EM Analysis on Post-Quantum KEMs,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(1), pp. 296–322, 2021. (presented at CHES 2022)
Shoei Nashimoto, Daisuke Suzuki, Rei Ueno, and Naofumi Homma, “Bypassing Isolated Execution on RISC-V using Side-Channel-Assisted Fault-Injection and Its Countermeasure,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2022(1), pp. 28–68, 2021. (presented at CHES 2022)
Akira Ito, Kotaro Saito, Rei Ueno, and Naofumi Homma, “Imbalanced Data Problems in Deep Learning-Based Side-Channel Attacks: Analysis and Solution,” IEEE Transactions on Information Forensics and Security, 16, pp. 3790–3802, 2021.
Akira Ito, Rei Ueno, and Naofumi Homma, “An Algebraic Approach to Verifying Galois-Field Arithmetic Circuits with Multiple-Valued Characteristics,” IEICE Transactions on Information and Systems, 104-D(8), pp. 1083–1091, 2021.
Rei Ueno, Naofumi Homma, Sumio Morioka, and Takafumi Aoki, “A Systematic Design Methodology of Formally-Proven Side-Channel-Resistant Cryptographic Hardware,” IEEE Design & Test, 38(3), pp. 84–92, 2021.
Akira Ito, Rei Ueno, and Naofumi Homma, “Efficient Formal Verification of Galois-Field Arithmetic Circuits Using ZDD Representation of Boolean Polynomials,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 41(3), pp. 794–798, 2021.
Ville Yli-Mäyry, Rei Ueno, Noriyuki Miura, Makoto Nagata, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger, and Naofumi Homma, “Diffusional Side-channel Leakage from Unrolled Lightweight Block Ciphers: A Case Study of Power Analysis on PRINCE,” IEEE Transactions on Information Forensics and Security, 16, pp. 1351–1364, 2020.
Rei Ueno, Kohei Kazumori, and Naofumi Homma, “Rejection Sampling Schemes for Extracting Uniform Distribution from Biased PUFs,” IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), pp. 86–128, 2020. (presented at CHES 2022)
Shotaro Sawataishi, Rei Ueno, and Naofumi Homma, “Unified Hardware for High-Throughput AES-Based Authenticated Encryptions,” IEEE Transactions on Circuits and Systems II: Express Briefs, 67(9), pp. 1604–1608, 2020. (presented at ISICAS 2020)
Rei Ueno, Junko Takahashi, Yu-ichi Hayashi, and Naofumi Homma, “A method for constructing sliding windows leak from noisy cache timing information,” Journal of Cryptographic Engineering, 11, pp. 161–170, 2020.
Rei Ueno, Sumio Morioka, Noriyuki Miura, Kohei Matsuda, Makoto Nagata, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger, and Naofumi Homma, “High Throughput/Gate AES Hardware Architectures Based on Datapath Compression,” IEEE Transactions on Computers, 69(4), pp. 534–548, 2020.
Rei Ueno, Manami Suzuki, and Naofumi Homma, “Tackling Biased PUFs through Biased Masking: A Debiasing Method for Efficient Fuzzy Extractor,” IEEE Transactions on Computers, 68(7), pp. 1091–1104, 2019.
Rei Ueno, Naofumi Homma, Yasuyuki Nogami, and Takafumi Aoki, “Highly Efficient GF(2^8) Inversion Circuit Based on Hybrid GF Representations,” Journal of Cryptographic Engineering, 9(2), pp. 101–113, 2019.
Manami Suzuki, Rei Ueno, Naofumi Homma, and Takafumi Aoki, “Efficient Fuzzy Extractors Based on Ternary Debiasing Method for Biased Physically Unclonable Functions,” IEEE Transactions on Circuits and Systems I: Regular Papers, 66(2), pp. 616–629, 2019.
Akira Ito, Rei Ueno, Naofumi Homma, and Takafumi Aoki, “Characterizing Parallel Multipliers for Detecting Hardware Trojans,” Journal of Applied Logics, 5(9), pp. 1815–1831, 2018.
Rei Ueno, Naofumi Homma, and Takafumi Aoki, “Automatic Generation System for Multiple-Valued Galois-Field Parallel Multipliers,” IEICE Transactions on Information and Systems, 100-D(8), pp. 1603–1610, 2017.
Rei Ueno, Naofumi Homma, Takafumi Aoki, and Sumio Morioka, “Hierarchical Formal Verification Combining Algebraic Transformation with PPRM Expansion and Its Application to Masked Cryptographic Processors,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 100-A(7), pp. 1396–1408, 2017.
Rei Ueno, Naofumi Homma, Yukihiro Sugawara, and Takafumi Aoki, “Formal Approach for Verifying Galois Field Arithmetic Circuits of Higher Degrees,” IEEE Transactions on Computers, 66(3), pp. 431–442, 2016.
Rei Ueno, Naofumi Homma, Takafumi Aoki, “A Formal Verification Method of Error Correction Code Processors Over Galois-Field Arithmetic,“ Journal of Multiple Valued Logic and Soft Computing, pp. 26(1–2): 55–73, 2016.
Rei Ueno, Naofumi Homma, and Takafumi Aoki, “Efficient DFA on SPN-Based Block Ciphers and Its Application to the LED Block Cipher,“ IEICE Transactions on Fundamentals of Electronics, Communications and Computer Science, 98-A(1), pp. 182–191, 2015
Rei Ueno, Hiromichi Haneda, Naofumi Homma, Akiko Inoue, and Minematsu Kazuhiko, “Crystalor: Recoverable Memory Encryption Mechanism with Optimized Metadata Structure,“ ACM SIGSAC Conference on Computer and Communications Security (CCS), pp. 228–242, 2024.
Shoei Nashimoto, Rei Ueno, and Naofumi Homma, “Comparative Analysis and Implementation of Jump Address Masking for Preventing TEE Bypassing Fault Attacks,“ The International Conference on Availability, Reliability and Security (ARES), No. 26, pp. 1–12, 2024.
Federico Canale, Tim Güneysu, Gregor Leander, Jan Philipp Thoma, Yosuke Todo, and Rei Ueno, “SCARF–A Low-Latency Block Cipher for Secure Cache-Randomization,” USENIX Security Synposium '23, pp.1937–1954, 2023.
Rei Ueno, Yusuke Yagyu, and Naofumi Homma, “Efficient DFA-Resistant AES Hardware Based on Concurrent Fault Detection Scheme,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp.196–201, 2023.
Akira Ito, Rei Ueno, and Naofumi Homma, “On the Success Rate of Side-Channel Attacks on Masked Implementations: Information-Theoretical Bounds and Their Practical Usage,” ACM Conference on Computer and Communications Security (CCS), pp.1521–1535, 2022.
Yuma Itabashi, Rei Ueno, and Naofumi Homma, “Efficient Modular Polynomial Multiplier for NTT Accelerator of Crystals-Kyber,” Euromicro Conference on Digital System Design (DSD), pp.528–533, 2022.
Rei Ueno and Naofumi Homma, “High-Speed Hardware Architecture for Post-Quantum Diffe–Hellman Key Exchange Based on Residue Number Systems,” IEEE International Symposium on Circuits and Systems (ISCAS), pp.2107–2111, 2022.
Keita Xagawa, Akira Ito, Rei Ueno, Junko Takahashi, and Naofumi Homma, “Fault-Injection Attacks against NIST’s Post-Quantum Cryptography Round 3 KEM Candidates,” International Conference on the Theory and Application of Cryptology and Information Security (ASIACRYPT), pp.33–61, 2021.
Akira Ito, Rei Ueno, and Naofumi Homma, “A Formal Approach to Identifying Hardware Trojans in Cryptographic Hardware,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp.154—159, 2021.
Kohei Kazumori, Rei Ueno, and Naofumi Homma, “Debiasing Method for Efficient Ternary Fuzzy Extractors and Ternary Physically Unclonable Functions,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 52–57, 2020.
Akira Ito, Rei Ueno, and Naofumi Homma, “Effective Formal Verification for Galois-field Arithmetic Circuits with Multiple-Valued Characteristics,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 46–51, 2020.
Dirmanto Jap, Ville Yli-Mäyry, Akira Ito, Rei Ueno, Shivam Bhasin, and Naofumi Homma, “Practical Side-Channel Based Model Extraction Attack on Tree-Based Machine Learning Algorithm,” Applied Cryptography and Network Security (ACNS) Workshops, LNCS 12418, pp. 93–105, 2020.
Maya Oda, Rei Ueno, Akiko Inoue, Kazuhiko Minematsu, and Naofumi Homma, “PMAC++: Incremental MAC Scheme Adaptable to Lightweight Block Ciphers,” IEEE International Symposium on Circuits and Systems (ISCAS), 4 pages, 2020.
Rei Ueno, Junko Takahashi, Yu-ichi Hayashi, and Naofumi Homma, “Constructing Sliding Windows Leak from Noisy Cache Timing Information of OSS-RSA,” International Workshop on Security Proofs for Embedded Systems (PROOFS 2019), 14 pages, 2019.
Kosuke Koiwa, Rei Ueno, Daisuke Fujimoto, Yuichi Hayashi, Makoto Nagata, Makoto Ikeda, Tsutomu Matsumoto, and Naofumi Homma, “Collision-Based EM Analysis on ECDSA Hardware and a Countermeasure,” Joint International Symposium on Electromagnetic Compatibility and Asia-Pacific International Symposium on Electromagnetic Compatibility (Joint IEEE EMC & APEMC 2019), pp. 793–796, 2019.
Rei Ueno, Naofumi Homma, Tomonori Iida, and Kazuhiko Minematsu, “High Throughput/Gate FN-Based Hardware Architectures for AES-OTR,” IEEE International Symposium on Circuits and Systems (ISCAS), 4 pages, 2019.
Kohei Kazumori, Rei Ueno, and Naofumi Homma, “A Ternary Fuzzy Extractor for Efficient Cryptographic Key Generation,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 49–54, 2019.
Akira Ito, Rei Ueno, Naofumi Homma, and Takafumi Aoki, “A Non-Reversible Insertion Method for Hardware Trojans Based on Path Delay Faults,” International Workshop on Security Proofs for Embedded Systems (PROOFS), pp. 50–67, 2018.
Manami Suzuki, Rei Ueno, Naofumi Homma, and Takafumi Aoki, “Quaternary Debiasing for Physically Unclonable Functions,” IEEE International Symposium on Multiple-Valued Logic, pp. 7–12, 2018.
Akira Ito, Rei Ueno, Naofumi Homma, and Takafumi Aoki, “On the Detectability of Hardware Trojans Embedded in Parallel Multipliers,” IEEE International Symposium on Multiple-Valued Logic, pp. 62–67, 2018.
Kazuhiro Oshida, Rei Ueno, Naofumi Homma, and and Takafumi Aoki, “On Masked Galois-Field Multiplication for Authenticated Encryption Resistant to Side Channel Analysis,” International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE), LNCS 10815, pp. 44–60, 2018.
Rei Ueno, Naofumi Homma, and Takafumi Aoki, “A Systematic Design of Tamper-Resistant Galois-Field Arithmetic Circuits Based on Threshold Implementation with (d + 1) Input Shares,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 136–141, 2017.
Wataru Kawai, Rei Ueno, Naofumi Homma, Takafumi Aoki, Kazuhide Fukushima, and Shinsaku Kiyomoto, “Practical Power Analysis on KCipher-2 Software on Low-End Microcontrollers,” IEEE EuroS&P Workshops on Security for Embedded and Mobile Systems (SEMS), pp. 113–121, 2017.
Manami Suzuki, Rei Ueno, and Naofumi Homma Takafumi Aoki, “Multiple-Valued Debiasing for Physically Unclonable Functions and Its Application to Fuzzy Extractors,” International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE), LNCS 10348, pp. 248–263, 2017.
Rei Ueno, Naofumi Homma, and Takafumi Aoki, “Toward More Efficient Tamper-Resistant AES Hardware Architecture Based on Threshold Implementation,” International Workshop on Constructive Side-Channel Analysis and Secure Design (COSADE), LNCS 10348, pp. 50–64, 2017.
Rei Ueno, Naofumi Homma, Sumio Morioka, and Takafumi Aoki, “Automatic Generation of Formally-Proven Tamper-Resistant Galois-Field Multipliers Based on Generalized Masking Scheme,” Design, Automation and Test in Europe Conference and Exhibition 2017 (DATE 2017), pp. 978–983, March 29, 2017.
Rei Ueno, Sumio Morioka, Naofumi Homma, and Takafumi Aoki, “A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths - Toward Efficient CBC-Mode Implementation,” International Conference on Cryptographic Hardware and Embedded Systems (CHES 2016), LNCS 9813, pp. 538–558, 2016.
Rei Ueno, Yukihiro Sugawara, Naofumi Homma, and Takafumi Aoki, “Formal Design of Pipelined GF Arithmetic Circuits and Its Application to Cryptographic Processors,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 217–222, 2016.
Rei Ueno, Naofumi Homma, Yukihiro Sugawara, Yasuyuki Nogami, and Takafumi Aoki, "Highly Efficient GF(2^8) Inversion Circuit Based on Redundant GF Arithmetic and Its Application to AES Design", International Workshop on Cryptographic Hardware and Embedded Systems (CHES), pp. 63–80, 2015.
Rei Ueno, Naofumi Homma, Yukihiro Sugawara, and Takafumi Aoki, “Formal Design of Galois-Field Arithmetic Circuits Based on Polynomial Ring Representation,“ International Symposium on Multiple-Valued Logic (ISMVL), pp. 48–53, 2015.
Yukihiro Sugawara, Rei Ueno, Naofumi Homma, and Takafumi Aoki, “System for Automatic Generation of Parallel Multipliers over Galois Fields,“ International Symposium on Multiple-Valued Logic (ISMVL), pp. 54–59. 2015.
Rei Ueno, Kotaro Okamoto, Naofumi Homma, and Takafumi Aoki, “An Efficient Approach to Verifying Galois-Field Arithmetic Circuits of Higher Degrees and Its Application to ECC Decoders,“ International Symposium on Multiple-Valued Logic (ISMVL), pp. 144–149, 2014.
Rei Ueno, "Fault Tolerance of Encrypted Memory: Crash Consistency Problem and Secure Recovery," Twintyfirst Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), September 4, 2024.
Rei Ueno, "Secure Implementation of Post-Quantum Cryptography: Challenges and Opportunities," International Conference on Information Security and Cryptology (ICISC), November 30, 2023.
Francesco Regazzoni, Shivam Bhasin, Amir Ali Pour, Ihab Alshaer, Furkan Aydin, Aydin Aysu, Vincent Beroulle, Giorgio Di Natale, Paul Franzon, David Hely, Naofumi Homma, Akira Ito, Dirmanto Jap, Priyank Kashyap, Ilia Polian, Seetal Potluri, Rei Ueno, Elena-Ioana Vatajelu, and Ville Yli-Mäyry, “Machine Learning and Hardware security: Challenges and Opportunities,” IEEE/ACM International Conference On Computer Aided Design (ICCAD), pp. 1–6, online, November 2020.
Rei Ueno, “Hardware Implementation of Block Cipher: Case Study Using AES,” The 9-th Asian-workshop on Symmetric Key Cryptography (ASK2019), December 14, 2019.
Rei Ueno, Naofumi Homma, and Takafumi Aoki, “Design of Highly Efficient Tamper-Resistnat AES Processor Based on 1st Order TI,“ International Workshop on Security (IWSEC) , January 1, 2017.