I am a Postdoctoral Associate in the System Software Research Group (SSRG) at Virginia Tech, working with Prof. Binoy Ravindran (Bradley Senior Faculty Fellow). My research focuses on computer architecture, with emphasis on hardware security, microcode-level enforcement mechanisms, Network-on-Chip architectures, and modeling heterogeneous systems. My work aims to develop secure, efficient, and scalable computing systems through architectural and microarchitectural innovations. I am currently a Co-Principal Investigator on an ONR-funded project investigating formally verified microcode customization for security exploit mitigation.

Research Highlights:

• Co-Principal Investigator, ONR TrustedCPU project

• Developed IOCS framework for automated software compartmentalization

• DARPA AISS project task lead on secure cryptographic hardware

• Expertise in microcode security, NoC architectures, and Gem5 modeling