Reviewer for Conferences

P. Koti Lakshmi, Rameshwar Rao., “High speed low power Domino OR gate in 16nm technology” , Fifth International Conference on Advances in Computing and Information Technology(ACITY 2015), July 2015,  pp135-141.

P. Koti Lakshmi, B. Santosh Kumar, Rameshwar Rao.,“ Implementation of Vedic multiplier using reversible gates”, Fifth International Conference on Advances in Computing and Information Technology(ACITY 2015), July 2015,  pp125-134.

P.Koti Lakshmi, Rameshwar Rao, “Design of cyclic code generator for high density VLSI chips”, Proceedings of International Conference on Inventive Computation Technologies (ICICT 2016), September 2016, pp 552-557, 978-1-5090-1284-8

Shaheena Perveen S., P. Koti Lakshmi, Rameshar Rao, Hemalatha Ralla palli., “ Eliminating fan out bottleneck in BCH encoders using VHDL” , International conference on Compution of power , energy, information and communication (ICCPIEC ) 2014.

P. Sreelatha, P. Koti Lakshmi, Rameshwar Rao., “ Performance analysis of 1-bit full adder using different design techniques” IEEE international conference on recent trends in Electronics and communication technology May19-20, 2017

P. Koti Lakshmi, Rameshwar Rao., “ Design  of area efficient high speed shift register for low power applications”, IEEE second International Conference on Advances in Computer and Communication (ICAECC 2018), Conducted by REVA university, Bangalore from 9th to 10th Feb 2018.