Integrated Circuits and Smart Systems Laboratory

Institute of Electronics, National Yang Ming Chiao Tung University

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Journal Papers

2023

C.-H. Yang, Y.-C. Wu, Y.-L. Chen, C.-H. Lee, J.-H. Hung, and C.-H. Yang, "An FM-index Based High-Throughput Memory-Efficient FPGA Accelerator for Paired-end Short-read Mapping," IEEE Transactions on Biomedical Circuits and Systems (TBioCAS), vol. 17, no. 6, pp. 1331-1341, Dec. 2023.

2022

Y.-S. Lin, Y.-P. Wu, Y.-C. Wu, P.-L. Lee, and C.-H. Yang, "Achieving Accurate Automatic Sleep Apnea/Hypopnea Syndrome Assessment Using Nasal Pressure Signal," IEEE Journal of Biomedical and Health Informatics (JBHI), vol. 26, no. 11, pp. 5473-5481, Nov. 2022.

2021

Y.-C. Wu, Y.-L. Chen, C.-H. Yang, C.-H. Lee, C.-Y. Yu, N.-S. Chang, L.-C. Chen, J.-R. Chang, C.-P. Lin, H.-L. Chen, C.-S. Chen, J.-H. Hung, and C.-H. Yang, "A 975mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28nm for Next-Generation Sequencing," IEEE Journal of Solid-State Circuits (JSSC) ISSCC 2020 Special Issue, vol. 56, no. 1, pp. 123-135, Jan. 2021.

2019

Y.-Z. Wang, Y.-P. Wang, Y.-C. Wu, C.-H. Yang, "A 12.6mW 573-2,901KS/s Reconfigurable Processor for Reconstruction of Compressively-Sensed Physiological Signals," IEEE Journal of Solid-State Circuits (JSSC), vol. 54, no. 10, pp. 2907-2916, Oct. 2019.
X.-H. Qian, Y.-C. Wu, T.-Y. Yang, C.-H. Cheng, S.-C. Chu, W.-H. Cheng, T.-Y. Yen, T.-H. Lin, Y.-J. Lin, Y.-C. Lee, J.-H. Chang, S.-T. Lin, S.-H. Li, T.-C. Wu, C.-C. Huang, S.-H. Wang, C.-F. Lee, C.-H. Yang, C.-C. Hung, T.-S. Chi, C.-H. Liu, M.-D. Ker, and C.-Y. Wu, "Design and In-Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem," IEEE Transactions on Biomedical Engineering (TBME), vol. 66, no. 11, pp. 3156-3167, Feb. 2019.

2017

Y.-C. Wu, J.-H. Hung, C.-H. Yang, “A 135mW Fully Integrated Data Processor for Next-Generation Sequencing,” IEEE Transactions on Biomedical Circuits and Systems (TBioCAS) ISSCC 2017 Special Issue, vol. 11, no. 6, pp. 1216-1225, Dec. 2017.

2016

C.-H. Chang, M.-T. Chou, Y.-C. Wu, T.-W. Hong, Y.-L. Li, C.-H. Yang, and J.-H. Hung, “sBWT: Memory Efficient Implementation of the Hardware-acceleration-friendly Schindler Transform for the Fast Biological Sequence Mapping,” Bioinformatics, vol. 32, no. 22, pp. 3498-3500, July 2016.

Conference Papers

2023

Y.-L. Chen, C.-H. Yang, Y.-C. Wu, C.-H. Lee, W.-C. Chen, L.-Y. Lin, N.-S. Chang, C.-P. Lin, C.-S. Chen, J.-H. Hung, C.-H. Yang, "A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing," International Solid-State Circuits Conference (ISSCC), pp. 44-45, Feb. 2023.

2022

C.-H. Yang, Y.-C. Wu, Y.-L. Chen, C.-H. Lee, J.-H. Hung, C.-H. Yang, "A 75.6M Base-pairs/s FPGA Accelerator for FM-index Based Paired-end Short-Read Mapping," IEEE Asian Solid-State Circuits Conference (ASSCC), Nov. 2022.
Y.-C. Lo, Y.-C. Wu, C.-H. Yang, "A 44.3mW 62.4fps Hyperspectral Image Processor for MAV Remote Sensing," International Symposium on VLSI Circuits (VLSI Circuits), pp. 74-75, June 2022.

2020

Y.-C. Wu, Y.-L. Chen, C.-H. Yang, C.-H. Lee, C.-Y. Yu, N.-S. Chang, L.-C. Chen, J.-R. Chang, C.-P. Lin, H.-L. Chen, C.-S. Chen, J.-H. Hung, C.-H. Yang, "A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing," Hot Chips 2020, Aug. 2020.
C.-C. Wen, Y.-C. Lee, Y.-C. Wu, C.-C. Kao, C.-H. Yang, "A 1.96 Gb/s Massive MU-MIMO Detector for Next-Generation Cellular Systems," International Symposium on VLSI Circuits (VLSI Circuits), June 2020.
Y.-C. Wu, Y.-L. Chen, C.-H. Yang, C.-H. Lee, C.-Y. Yu, N.-S. Chang, L.-C. Chen, J.-R. Chang, C.-P. Lin, H.-L. Chen, C.-S. Chen, J.-H. Hung, C.-H. Yang, "A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing," International Solid-State Circuits Conference (ISSCC), pp. 322-323, Feb. 2020.

2019

C.-H. Lu, Y.-C. Wu, and C.-H. Yang, "A 2.25 TOPS/W Fully-Integrated Deep CNN Learning Processor with On-Chip Training," IEEE Asian Solid-State Circuits Conference (ASSCC), pp. 65-58, Nov. 2019.

2018

Y.-Z. Wang, Y.-P. Wang, Y.-C. Wu, C.-H. Yang, “A 12.6mW 573-2,901KS/s Reconfigurable Processor for Reconstruction of Compressively-Sensed Physiological Signals,” International Symposium on VLSI Circuits (VLSI Circuits), pp. 261-262, June 2018.

2017

X.-H. Qian, Y.-C. Wu, T.-Y. Yang, C.-H. Cheng, H.-C. Chu, W.-H. Cheng, T.-Y. Yen, T.-H. Lin, Y.-J. Lin, Y.-C. Lee, J.-H. Chang, S.-T. Lin, S.-H. Li, T.-C. Wu, C.-C. Huang, C.-F. Lee, C.-H. Yang, C.-C. Hung, T.-S. Chi, C.-H. Liu, M.-D. Ker, and C.-Y. Wu, “A Bone-Guided Cochlear Implant CMOS Microsystem Preserving Acoustic Hearing,” International Symposium on VLSI Circuits (VLSI Circuits), pp. 46-47, June 2017.
H.-T. Lin, Y.-C. Wu, P.-H. Hsieh, C.-H. Yang, “Integration of Energy-Recycling Logic and Wireless Power Transfer for Ultra-Low-Power Implantables,” International Symposium Circuits and Systems (ISCAS), pp. 1-4, May 2017.
Y.-C. Wu, J.-H. Hung, C.-H. Yang, “A 135mW Fully Integrated Data Processor for Next-Generation Sequencing,” International Solid-State Circuits Conference (ISSCC), pp. 252-253, Feb. 2017.

Patents

J.-H. Hung, C.-H. Yang, Y.-C. Wu, Y.-L. Chen, C.-H. Yang, "Data Processing System for Processing Gene Sequencing Data," US 2023/0154570 A1, May 2023.
J.-H. Hung, C.-H. Yang, Y.-C. Wu, "A Data Processor Architecture for Next-Generation Sequencing," US 11,302,419 B2, Apr. 2022.

Taiwan