Notifying Memories for Dynamic Data-Flow Application

Summary


The era of many-cores in now wide open. These architectures that combine several cores should allow the continued performance scaling, for either embedded systems or high performance computing. However, enabling the scaling of smaller systems requires significant research breakthroughs in three key areas: power efficiency, programmability, and execution granularity. The improved technology alone will not be sufficient. Improvements in architecture and systems are also needed. The heritage of Von Neumann architectures, where computation units are separated from the memories hits the well-known memory wall. The use of networks on-chip (NoC) allows to increase the bandwidth, but at a very high energy consumption cost, and increases at the same time the latency to the data, leading to a higher execution time of the applications. The concept of processing in memory, which brings computation close to memory, is gaining renewed interest. This project goes beyond with the concept of notifying memories, which provides hardware notification capabilities to the memories. The approach breaks the classical architectural organisation as memories can be master and initiate transactions on the NoC. The hardware component is close to the memory, programmable as to fit with application demands, and directly sends the information or the data through notifications to the processor. Besides, most of the applications are developed with programming languages not suited for parallel architectures. Data-flow programming is a programming paradigm that allows the developer to explicitly specify both temporal and spatial parallelism of the application, while completely abstracting the underlying target architecture. A data-flow application is a network of actors, each actor is in charge of part of the computing, that communicate through unbounded FIFOs to transfer the data. This project will consider so-called dynamic data-flow application since their expressibility allows for specifying data-dependent applications (like the HEVC codec which is nearly impossible to specify with static models). The main drawback with dynamic applications is the need to check the firing rules of the actors at runtime and this leads to many memory requests, that are useless sometimes. The concept of notifying memories deletes all the useless memory requests, thus reducing the traffic of the NoC and the energy consumption, while improving the performance of the application and leaves the NoC bandwidth for useful communication. This concept changes deeply the hardware and needs to be studied jointly with the compilation chain to make it imperceptible to the application developer. This notification concept does not exist in any related work and we are the first to publish on that topic. The promising results that we have deserve a more thorough study. The goal is to keep the head start on that idea and to reinforce our results with the development of this new architecture and the associated compilation chain.

This project is funded by the french research agency

ANR (Agence Nationale de la Recherche)