As semiconductor devices continue to scale down, the width of interconnect wires also becomes ever narrower. This shrinking geometry increases both the wire resistance (and the conductors' resistivity) and the parasitic capacitance, causing the RC delay to grow dramatically. Such delays not only limit device switching speeds but also drive up overall power consumption. Consequently, discovering and integrating new interconnect materials whose resistivity can be effectively controlled has emerged as a key strategy for improving device performance and reducing power usage.
A topological semimetal is a material whose conduction and valence bands meet at discrete points or along lines in momentum space, with these band crossings protected by specific crystal symmetries. In these materials, back-scattering of charge carriers on the surface is strongly suppressed, resulting in extremely high carrier mobility and low resistivity. Moreover, as the surface-to-volume ratio increases in nanoscale wires, the net resistivity of a topological semimetal can actually decrease, offering the potential for faster signal propagation and lower power dissipation in scaled interconnects. For these reasons, topological semimetals are attracting attention as promising candidates for next-generation, high-speed, low-power semiconductor interconnect materials.
Joon-Seok Kim, Joonyun Kim, Daejin Yang, Jaewoo Shim, Luhing Hu, Jeehwan Kim, Sangwon Kim,
"Addressing interconnect challenges for enhanced computing performance"
Science, 386, 6727 (2024)