The 17th MRAM Global Innovation Forum
December 11, 2025
San Francisco, USA
Embedded Files
Registration is open
The MRAM Global Innovation Forum is an annual event that brings together leading experts, researchers, and industry professionals in the field of Magnetoresistive Random Access Memory (MRAM).
The forum serves as a platform for sharing the latest advancements, innovations, and research findings in MRAM technology, which is a type of non-volatile memory known for its high speed, endurance, and low power consumption.
This annual one-day event, held the day after IEDM, will feature 12 invited talks from leading experts in MRAM technology, along with a panel discussion.
Date & Location
December 11, 2025
8:45 AM - 6 PM | Room Imperial A/B
Registration
From September 22 to December 1, 2025
The event is free and includes a free lunch, but it is limited to 250 participants.
Program
Technology Development
Allen Wang, TSMC - High-Performance MRAM for advancing automotive innovation
Siddarth Gupta, GlobalFoundries - MRAM macro design challenges for Automotive applications in 22nm-FDSOI technology
Jeong-Heon Park, Samsung - Recent Advances in Robust and Scalable Embedded MRAM
Product Development
Thomas Jew, NXP - MRAM at the Edge
Tomoya Saito, Renesas - Trends in Embedded MRAM MCUs for Edge AI Applications
Masanori Hosomi, Sony - eMRAM for image sensor applications
Max Simmons, Numem - MRAM Powered by Numem’s AI Memory Engine – Paving the Way for Low-Power Intelligence Everywhere
Tool Development
Xiaoyu Kang, LAM - Tight-pitch MRAM Patterning with Lam IBE System
Siamak Salimy, Hprobe - Innovations in Wafer-Level Testing for Modern and Next-Generation MRAM Technologies
Exploratory Topics
Mike Burkland, Raytheon - Applications & Performance Goals of MRAM in DoD Applications
Guohan Hu, IBM - Progress and gaps in Double Spin-torque MTJs for last level cache applications
Takahiro Hanyu, Tohoku University - Challenges of CMOS/spintronics-hybrid logic design for edge AI hardware
Booklet
Panel Discussion
MRAM in System-Level Design: Benefits & Challenges
Panelists
Tomoya Saito, Senior Principal Engineer, Renesas
Kevin Conley, CEO, Applied Brain Research, ABR
Reza Kazerounian, Co-founder and President, Alif Semiconductor
Max Simmons, CEO, Numem
Masanori Hosomi, Principal Engineer, Sony Semiconductor Solutions
Organizers
Chair
Kevin Garello and Daniel Worledge
Program Committee
Bernard Dieny (Spintec, France)
Shunsuke Fukami (Tohoku University, Japan)
Kevin Garello (Spintec, France)
Jack Guedj (Numem, USA)
Jean Anne Incorvia (University of Texas at Austin, USA)
Jordan Katine (Western Digital, USA)
Kyung-Jin Lee (KAIST, South Korea)
Vinayak Bharat Naik (Tata Electronics, India)
Luc Thomas (Vertical Computing Technology, USA)
Daniel Worledge (IBM, USA)
Ackowledgements
This Forum marks the 17th edition of a series initiated by Samsung Semiconductor in 2013.
It is supported by Samsung Semiconductor through a donation to the IEEE Magnetics Society.
The Society extends its deep gratitude to Samsung for their continued sponsorship.
We also thank the IEEE Magnetics Society for their logistical support and additional funding.
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