Educational Qualification:
Ph.D.
NSIT, (University of Delhi), Delhi
M. Tech in Electronics Engineering
Yeshwatrao Chavan College of Engineering, Nagpur
Bachelor of Electronics Engineering
RTMN University, Nagpur
Area of Specialization: Analog Circuit Designs, Embedded Systems, Machine Learning, and Artificial Intelligence
Teaching Experience: 14+ years
Subjects Taught: Microprocessors and Microcontrollers, Digital Circuits, Digital Signal Processing, Electrical Science, Microelectronics, Reinforcement Learning and Deep Learning
Journal and Conference Publications:
International Journals:
DBID-Net: A Deep Learning Architecture for Cyber-Physical System Security in Industry 4.0, Trupti Mohota, Neetu Singh, Mihika Mahendra, Communicated to IEEE Access, 2025. (SCI)
Stress Detection and Management Using Machine Learning: A Comprehensive Approach, Ruchi Sharma, Mihika, Annu Dabas, Rubeena Vohra, Suman Yadav, Gaurav Mitra, Accepted in Journal of Information and Optimization Sciences, Feb 2025. (ESCI)
DOI : 10.47974/JIOS-1861
Multimodal Dialogue System : Seamless Sign Language to Text and Speech Translation, Trupti Mohota, Mihika Mahendra, Rohan Chavan; Omkar Jagtap; Nagesh kumar Kokane, Applied Corpus Linguistics Journal (under review), Dec 2024 (SCOPUS)
Aditya Sharma, Umang Seth, Rahul Mittal, Sandeep Singh, Mihika Mahendra, “Depth Perception using Stereo Panorama with a Single Camera”, Journal of Emerging Technologies and Innovative Research, Volume 10, Issue 7, ISSN-2349-5162, July 2023. (UGC Care)
Harsh Jain, Parth Khandelwal, Kartik Kumar, Raghav Agarwal, Mihika Mahendra, “Design of Low-Power High-Performance Operational Transconductance Amplifier”, Journal of Emerging Technologies and Innovative Research, Volume 10, Issue 6, ISSN-2349-5162, June 2023. (UGC Care)
Mihika Mahendra, Shweta Kumari, Maneesha Gupta, “Low voltage fully differential OTA using DTMOS based self cascode transistor with slew-rate enhancement and its filter application”, Integration, The VLSI Journal (Elsevier) Impact factor - 1.345, vol. 84, pp. 47-61, 2022. ISSN-0167-9260. (SCI)
DOI: https://doi.org/10.1016/j.vlsi.2022.01.003
Mihika Mahendra, Shweta Kumari, Maneesha Gupta, and Ankur Sangal, “Low Voltage High Performance Super Class AB OTA design using SCCM and DTMOS with Enhanced Slew Rate and DC Gain”, Microelectronics Journal (Elsevier), Impact factor- 1.992, Volume-113, 105101, ISSN-0026-2692, July 2021. (SCI)
DOI: https://doi.org/10.1016/j.mejo.2021.105101
Mihika Mahendra, Shweta Kumari, and Maneesha Gupta, “DTMOS Based Low Power Adaptively Biased Fully Differential Transconductance Amplifier with Enhanced Slew-Rate and its Filter Application”, IETE Journal of Research (Taylor and Francis), Impact factor-2.333, ISSN 0377-2063, June 2021. (SCI)
DOI: https://doi.org/10.1080/03772063.2021.1925599
Atul B. Khode, Mithilesh Mahendra, “Efficient Wide Frequency Range Voltage Control Oscillator for PLL using 180nm CMOS Technology”, International Journal of Engineering Research & Technology (IJERT), Volume 4 Issue 06, June 2015, ISSN: 2278-0181, Impact Factor-1.76
Snehal Kulkarni, Mithilesh Mahendra, “Study of Tree Multiplier Using Reversible Logic Gate”, International Research Journal of Engineering and Technology (IRJET), Volume 02 Issue 02, May 2015, e-ISSN: 2395 -0056, p-ISSN: 2395-0072, Impact Factor-4.45
Roshan Bonde, Mithilesh Mahendra, Vidya Dahake, “A General Framework for Reversible Data Hiding :A Review”, International Journal For Research In Emerging Science And Technology, Volume 2, Issue 6, Jun-2015, E-ISSN: 2349-7610, Impact Factor is 2.173 Evaluated from SJIF, Impact Factor is 0.413 Evaluated from ISRA.
URL:http://www.ijrest.net/downloads/volume-2/issue-6/pid-ijrest-26201532.pdf
Priya Meshram, Mithilesh Mahendra and Parag Jawarkar, “Designed Implementation of Modified Area Efficient Enhanced Square Root Carry Select Adder”, International Journal For Research In Emerging Science and Technology, Volume 2, Issue 5, May 2015, E-ISSN: 2349-7610, Impact Factor is 2.173 Evaluated from SJIF, Impact Factor is 0.413.
URL: http://ijrest.net/downloads/volume-2/issue-5/pid-ijrest-25201534.pdf
Kalyani Khanke, Mithilesh Mahendra “Design of QoS Aware Energy Efficient Routing Protocol for Wireless Sensor Networks” International Journal for Research In Emerging Science And Technology, Volume 2, Issue 6, Jun 2015, E-ISSN: 2349-7610, Impact Factor is 2.173 Evaluated from SJIF, Impact Factor is 0.413 Evaluated from ISRA
URL:http://ijrest.net/downloads/volume-2/issue-6/pid-ijrest-26201533.pdf
Atul B. Khode, Mithilesh Mahendra, “CMOS Technology Approach an Efficient Wide Frequency Range by a Voltage Control Oscillator for Phase Lock Loop - A Review”, International Journal for Research In Emerging Science And Technology, Volume 2, Issue 6, Jun 2015, E-ISSN: 2349-7610, Impact Factor is 2.173 Evaluated from SJIF, Impact Factor is 0.413 Evaluated from ISRA URL: http://ijrest.net/downloads/volume-2/issue-6/pid-ijrest-26201529.pdf
Parag S. Bhiwadare, Mithilesh Mahendra, “Dual Tree Complex Wavelet Transform based Noise Reduction Technique”, International Journal of Advanced Research in Computer and Communication Engineering, Volume 4, Issue 6, June 2015, ISSN (Online) 2278-102, ISSN (Print) 2319-5940,
URL:https://pdfs.semanticscholar.org/d7fe/f50573fa74cc304ad84732e9d6d7b98638a.pdf
Parag S. Bhiwadare, Mithilesh Mahendra, “Dual Tree Complex Wavelet Transform Based Noise Reduction Technique in Image Processing”, International Journal For Research In Emerging Science and Technology, Volume 2, Issue 5, May 2015, E-ISSN: 2349-7610, Impact Factor is 2.173 Evaluated from SJIF, Impact Factor is 0.413 Evaluated from ISRA
URL:https://pdfs.semanticscholar.org/940b/ed6e1f405838417d20a0fae8f7b23b30bb84.pdf
Rakshita R. Narnaware, Mithilesh Mahendra, Mamta Sarde, “Carrier Interference Ratio Analysis & Cancellation scheme For OFDM System Affected by Frequency Offset or Phase Offset”, International Journal of Modern Trends in Engineering and Research (IJMTER) Volume 02, Issue 03, March 2015, pp no. 201-206, e-ISSN: 2349-9745, Scientific Journal Impact Factor (SJIF): 1.711.
URL:http://www.ijmter.com/papers/volume-2/issue-3/carrier-interference-ratio-analysis-cancellation-scheme-for-ofdm-sys.pdf
Mithilesh Mahendra, VLSI Implementation of Multi Mode SoC FMA 128 bits, Association for International Journal in Computer science and Electronics, Volume 3 Issue 3, February 2014, ISSN 2320-396X.
International Conferences:
Performance Evaluation of OTA based Fractional Order Oscillator Mishra, U.K., Saha, S., Gupta, T.,Mahendra, M., Soni, A., 15th International Conference on Advances in Computing, Control, and Telecommunication Technologies, ACT 2024, pp. 4780–4784, 2024, (SCOPUS)
Mihika Mahendra, Shweta Kumari, and Maneesha Gupta, Low Voltage Adaptive Biased OTA with Enhanced Slew Rate and its application in Universal Filter, 5th IEEE International Conference on Electrical, Electronics, Communication, Computer Technologies & Optimization Techniques (ICEECCOT2021), GSSSIETW, Mysuru, India, 10th-11th December 2021. (SCOPUS) DOI: 10.1109/ICEECCOT52851.2021.9708040
M. Mahendra, S. Kumari, and M. Gupta, "Low Voltage High Performance Fully Balanced Operational Transconductance Amplifier with Improved Slew Rate”, 7th IEEE International Conference on Signal Processing and Integrated Networks (SPIN), Noida, India, pp. 819-823, February-2020 (SCOPUS)
DOI:10.1109/SPIN48934.2020.9070882
Mithilesh Mahendra, Sandeep Kakde, Somulu G.,“HDL Implementation of 128- Bit Fused Multiply Add Unit for Multi Mode SoC”, IEEE International Conference on Communication and Signal Processing (ICCSP’14), Melmaruvathur, Chennai, India, pp. 595-599, April 3-5, 2014, , ISBN 978-1-4799-3357-0. (SCOPUS)
DOI: 10.1109/ICCSP.2014.6949923
Kakde S., Mahindra M., Khobragade A., Shah N. (2015) FPGA Implementation of 128-Bit Fused Multiply Add Unit for Crypto Processors. In: Abawajy J., Mukherjea S., Thampi S., Ruiz-Martínez A. (eds) Security in Computing and Communications. SSCC 2015. Communications in Computer and Information Science, vol 536. Springer. (SCOPUS)
DOI: https://doi.org/10.1007/978-3-319-22915-7_8
Mithilesh Mahendra, “Design and Implementation of 128 bit Quadraple precision FMA Unit for Many Core Processors”, 22nd and 23rd January, 2016, ISSN No. 2454-1958, Page no. 288-292.
Patents:
Title of the Invention: Machine Learning based Stress Detection Device, Indian Design Patent, Design No. 445591-001, Granted on 28 April 2025.
Title of the Invention: Automated Organic Waste to Biodegradation Machine", UK Design Patent, Design No. 6427222, Granted on 12 March 2025.
Title of the Invention: Blockchain-Based Voting System as an Alternative to Electronic Voting Machines in India, Indian Utility Patent, Published and Awaiting Examination.
FDP/STTP/Workshops Organized :
Organizing team member for the International conference on “Recent Advances in Artificial Intelligence, Communication and Electronic Systems” (RAICE 2025) held on 6th-8th February 2025, at Bharati Vidyapeeth’s College of Engineering, New Delhi.
Organizing Committee Member of “Research Excellence Award Ceremony 2023-24” organized by Research and Development Cell, Bharati Vidyapeeth’s College of Engineering, New Delhi, September 2024.
Organizing Committee Member of a three-day FDP on “Navigating the Landscape of IPR” under the Research and Development Cell in collaboration with Intellectual Property Rights at Bharati Vidyapeeth’s College of Engineering, New Delhi from 19th-21st Sep, 2024.
Organizing Committee Member of a one-week STC on “Emerging Trends in Electronics and Communication” at Bharati Vidyapeeth’s College of Engineering, New Delhi, from 18th to 23rd July 2023.
Co-organizing Secretary for the two-day International Conference “Techotronics-17” at TGPCET, 2017
Co-ordinator for two days International Conference “Techotronics-16” at TGPCET, 2016.
Organized Two days National workshop on Quad Copter in association with IIT Madras in February 2015, 50 students attended from the Vidarbha Region.
Delivered Guest Lecture on “Microprocessors and Their Interfacing” at SDMP in 2013.
Organized a three-day National workshop on “Scilab” sponsored by IIT Mumbai in 2011 for the Faculty and Research Scholars.
Organized a three-day National workshop on i-Robotics in association with IIT Bombay, 2011.
Outreach Activities:
Five-day training program on Intel Unnati AI Research Lab at the Department of CSE, Bharati Vidyapeeth’s College of Engineering, New Delhi, from 20th to 24th January 2025.
One week FDP on “Next-Gen AI: Innovations in Machine Learning, Deep Learning, and Generative Models” organized by Marathwada Mitra Mandal’s Institute of Technology, Lohgaon, Pune, from 06th-11th January 2025.
One week Faculty Development Program on “Revolutionary AI: Blending Generative Power with Learning Machines organized by VIT, Pune from 16th -20th Dec. 2024.
One week Short Term Training Program on “VLSI Design”, National Institute of Electronics and Information Technology, Center of Excellence in Chip Design, Noida, on 26th-30th December 2023.
One Week National Level Faculty Development program on “Cloud Infrastructure” JNTUK University College of Engineering Narasaraopet, Andhra Pradesh on 21st-25th August 2023.
Two days Capacity Building Workshop on “OBE and Accreditation Process (NEP-2020: Towards Holistic Education”, Bharati Vidyapeeth’s Educational Complex, New Delhi, on 02nd-3rd June 2023.
One Week FDP on ”Role of Computational Intelligence in Society”, Bharati Vidyapeeth’s College of Engineering, New Delhi on 15th-20th May 2023.
IEEE sponsored One Week FDP on ”The Recent Trends in VLSI Design and its Research Issues in Industry Compliance”, G.H Raisoni College of Engineering, Nagpur on 06th-11th March 2023.
NAAC Sponsored Two days FDP on “Role of IQAC in Quality Enhancement and sustainability, organized by IQAC and Mechanical Engineering, Tulsiramji Gaikwad-Patil College of Engineering and Technology on 14th-15th Oct 2022.
Online training/webinar on “IEEE Xplore” organized by Bharati Vidyapeeth's College of Engineering, New Delhi on 7th June 2022.
Five days online FDP on “Inculcating Universal Human Values in Technical Education” organized by All India Council for Technical Education (AICTE), from 9th -13th May 2022.
Five days FDP on “Emerging Trends in Electronics and Communication Engineering” organized by Bharati Vidyapeeth’s College of Engineering, New Delhi, from 12th -16th July 2021.
Two Days FDP on “Essentials of Linux System Administration” organized by Fr. Conceicao Rodrigues College of Engineering, Mumbai, on 16th-17th April 2021.
AICTE Sponsored One-week Online Short Term Training Programme (STTP) on “VLSI Design Using Cadence Tools” organized by Sardar Patel Institute of Technology, Mumbai, from 12th Oct to 5th Dec 2020.
AICTE Sponsored Online Short Term Training Program (STTP) On “Recent Trends & Applications in Analog VLSI Design” organized by Priyadarshini College of Engineering, Nagpur from 26th to 31st October 2020.
National Level Webinar "How to write Research Papers and Publish in International Journals", at Dr. Ambedkar Institute of Technology, Bengaluru on the 9th of July 2020.
Webinar on "Intellectual Property Rights & Patent Filing" organized by Rajeshwari College of Engineering, Bengaluru on 20th June 2020.
One week FDP on “Effective Proposal Writing for Research and Funding” organized by Sandip Institute of Technology and Research Center, Nashik in association with IEEE Women in Engineering from 14th-18th May 2020.
One Day workshop online Hand-on workshop on Microchip’s Internet of Things in association with Apis solution, Bengaluru, organized by Department of Electronics and Communication Engineering, Shri Venkateshwara College of Engineering, Bengaluru, on 13th May 2020.
One Week FDP on “Analog Integrated Circuit Design using Cadence Analog Design Flow”, organized by JSS Academy of Technical Education, Noida, and sponsored by Dr. A.P.J. Abdul Kalam Technical University, Lucknow, under TEQIP Phase-III from 27th August -1st September 2018.
One Week STTP on “Research Methodology”, organized by Delhi School of Management, Delhi Technological University from 14th -18th December 2016.
One week STTP on “Advanced Embedded System Design using ARM Processor and Lab-View” (AESD-15) approved by ISTE organized by Electronics department YCCE from 14th -18th December 2015.
Two Days National Level Workshop on “Outcome Based Accreditation System-NBA” at Shegaon College of Engineering, Shegaon in December 2014..
Two weeks ISTE Workshop on “Introduction to Research Methodologies” conducted by IIT Bombay from 25th June to 04th July 2012 under MHRD.
Two weeks STTP program sponsored by AICTE on “Improving Teaching Skills of Technical Teachers” from 13th to 25th March 2006.
Awards/Professional Services:
Received Best Paper Award at the 5th IEEE International Conference on Electrical, Electronics, Communication, Computer Technologies & Optimization Techniques, GSSSIETW, Mysuru in 2021
Received Best Teacher Award at Tulsiramji Gaikwad-Patil College of Engineering and Technology, Nagpur in 2014.
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