Research Experience

Graduate Research Assistantship (GRA) at SCCAD Laboratory at Georgia Tech

• • Semiconductor Research Corporation (SRC) - JUMP 2.0: CHIMES

    • High Performance Computing for AI on Glass Interposer.

    • Monolithic 3D DRAM as a Replacement for HBM: Impacts on Signal Integrity and System Performance.

Graduate Research Assistantship (GRA) at GTCAD Laboratory at Georgia Tech

• • Samsung USA - Logic Path Finding Lab

    • Co-optimization between Backside Power Delivery Network and Backside Clock Routing for Advanced Technology.

    • Design Methodology for Backside Signal Routing.

  • Samsung Advanced Institute of Technology(SAIT) Project

    • Block-level design flow for 3nm Logic-on-Logic 3D IC with 1um hybrid bond pitch.

    • VAE-Assisted Optimizer for Architecting Mixed-Node, Mixed-Area 3D ICs

Undergraduate Research Internship

• • SOR Laboratory at Seoul National Univeristy

    • Hardware cost-aware Design Space Exploration for DNN Accelerator

  • VLSI Laboratory at Seoul National Univeristy

    • Binarization method for Graph Neural Network