Ph. D. Project [2014 - 2018] - Development of a high accuracy and low power Star Tracker for nano-satellites under Associate Professor Shoushun Chen at Nanyang Technological University (NTU), Singapore.
Development of star identification algorithm - i
Development of star identification algorithm - ii
Light weight casing developed for the sensor and FPGA boards
Image sensor and FPGA board
Sensor and FPGA board configured and stacked in the casing
Star tracker testing system (Check the live demo by clicking on the link beside)
Research Intern [February 2018] - Embedded Core Technology Department at Toshiba Devices & Storage Corporation (TDSC), Tokyo, Japan.
Undergraduate Final Year Project [January-May, 2014] - Modifying Cache Replacement Algorithm in Multicore Systems under Prof. Dr. N. Ramasubramanian at National Institute of Technology (NIT), Tiruchirappalli, India.
Summer Research Internship 2013 (DAAD Fellowship 2013) - Development of a Translator v2NuSMV: Translates from a subset of Verilog HDL into the input language of Open Source Formal Verification Tool NuSMV under Prof. Dr. Ulf. Schlichtmann guided by M.Sc. Alessandro Bernardini at Department of Electronic Design and Automation at Technical University of Munich, Germany.
Working of v2NuSMV translator.
Verilog netlist of a 2-bit binary counter.
Translated 2-bit binary counter to NuSMV by v2NuSMV.
Summer Research Internship 2012 (May-July, 2012) - Development of Hardware Circuit for Single Phase and Three Phase Controlled and Uncontrolled Rectifiers under Dr. Raghavan.K at Department of Electrical Engineering, IIT Gandhinagar.
Miscellaneous Open Source Projects and Contributions - Github Projects