I collaborate with Dr. Andrew Schwartz and his lab to develop a novel neuromorphic brain decoder for motor control. This architecture allows decoding individual spikes produced by neurons of the motor cortex (M1) to infer intended arm movements. The ability to decode single spikes reduces the delay of these systems and the computational overhead given by traditional rate-based decoders. This project will pave the way for more low-power and portable intracortical Brain-Computer Interfaces (iBCI), increasing accessibility to this technology.Currently, iBCI are the only solution to restore fine motor control and sensory inputs in patients affected by several neurological disorders(Tetraplegia, Locked In Syndrome, Stroke).
Feedback in neuromorphic architectures
Under the supervision of Dr. Ryad Benosman, I am currently developing a novel learning algorithm for neuromorphic architectures based on HOTS. In these architectures, unsupervised clustering is used at each layer to extract repeating patterns of spiking activity from previous layers. My work is to find ways in which top-down signals (feedback) can be used to only cluster and respond to relevant stimuli. In the figure, an example of a neuromorphic layer learning characters of two made-up words ("VXV" and "V/V"). Therefore, only "X" and "/" are relevant to the classification problem. This project will enable novel architectures to dynamically adapt to event-based stimuli to increase accuracy, decoding stability, and skip redundant computation.
Finding the "right substrate" for neuromorphic architectures.
One problem with neuromorphic architectures is that they are often implemented on the same electronic hardware we use for "standard" computers. These electronic components are not well suited to replicate biological counterparts like neurons and synapses. Under the supervision of Dr. Feng Xiong, I am currently studying how memristive devices built by his group could be used for neuromorphic architectures. Similarly to synapses, these devices can be used to learn and process precise temporal information. My work is to build computational models of memristors and test if device natural stochasticity can affect accuracy and information in neuromorphic architectures. This project aims to find a better hardware substrate to accelerate the next generation of neuromorphic architectures.