Publications

1. [Conference] M. Esmaeilian, Z. Kazemi, A. Mirbaha, V. Beroulle, Mahdi Fazeli, ”Experimental Evaluation of Delayed-based Detectors against Power-off Attack”, in the proceedings of the 29th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS, 2023.

2. [Journal] M. Akbari1, S. Mirzakuchaki, V. Jamshidi, Mahdi Fazeli, M. Tarihi ”An ultra-compact Pure magnetic Arbiter PUF with high reliability and low power consumption”, accepted for publication in the IEEE Transactions on Nanotechnology., 2023.

3. [Journal] A. Norollah, E. Kazemi, Mahdi Fazeli, ”A Resource-aware High-speed Sorting Accelerator”, accepted for publication in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023.

4. [Journal] A. Mansoor, Mahdi Fazeli, A. M. Rahmani, and M. Reshadi, ”Optimized reverse converters with multi-bit soft error correction support at 7nm technology”, Journal of Computers and Electrical Engineering, 107, p.108654, 2023.

5. [Conference] Z. Kazemi, A. Norollah, Mahdi Fazeli, D. Hely, and V. Beroulle. ”An Offline Hardware Security Assessment Approach using Symbol Assertion and Code Shredding.” 23rd International Symposium on Quality Electronic Design (ISQED), pp. 1-1. IEEE, 2022.

6. [Journal] A. Norollah, H. Beitollahi, Z. Kazemi, and Mahdi Fazeli. ”A security-aware hardware scheduler for modern multi-core systems with hard real-time constraints.” Microprocessors and Microsystems, 2022.

7. [Journal] A. Salahvarzi, M. Khosroanjam, A. M. Hosseini Monazzah, H. Beitollahi, U. Y. Ogras, Mahdi Fazeli, ”WiSE: When Learning Assists Resolving STT-MRAM Efficiency Challenges”, IEEE Transactions on Emerging Topics in Computing, 2022.

8. [Journal] V. Jamshidi, A. Patooghy, Mahdi Fazeli ”MagCiM: A Flexible and Non-Volatile Computing-in-Memory Processor for Energy-Efficient Logic Computation”, IEEE Access, 2022.

9. [Journal] S. Kashi, A. Patooghy, D. Rahmati, Mahdi Fazeli, ”A multi-application approach for synthesizing custom network-on-chips”, Elsevier, The Journal of Supercomputing, 2022.

10. [Journal] E. Aerabi, M. Fazeli, A. Papadimitriou, D. Hely, ”CyEnSe: Cyclic Energy-aware Scheduling for Energy-Harvested Embedded Systems”, Microprocessors and Microsystems, 2022.

11. [Conference] A. Norollah, Z. Kazemi, D. Derafshi, H. Beitollahi, and Mahdi Fazeli. ”Protecting Security-Critical Real-Time Systems against Fault Attacks in Many-Core Platforms.” International Symposium on Real-Time and Embedded Systems and Technologies (RTEST), pp. 1-6. IEEE, 2022.

12. [Journal] H. Beitollahi, D. M. Sharif, and Mahdi Fazeli, ”Application layer DDoS attack detection using cuckoo search algorithm-trained radial basis function.” IEEE Access, 2022.

13. [Journal] M. Yakhchi, Mahdi Fazeli, S. A. Asghari, ”Silent Data Corruption Estimation and Mitigation Without Fault Injection|, IEEE Cana- dian Journal of Electrical and Computer Engineering, 2022.

14. [Conference] S. N. Estiri, A. H. Jalilvand, S. Naderi, M. H. Najafi, Mahdi Fazeli, ”A Low-Cost Stochastic Computing-based Fuzzy Filtering for Image Noise Reduction.” Proceedings of IEEE 13th International Green and Sustainable Computing Conference (IGSC), 2022.

15. [Journal] E. Aerabi, D. Hely, M. Fazeli, A. Papadimitriou, ”CON- FISCA: an SIMD-based CONcurrent FI and SCA countermeasure with switchable performance and security modes.”, Journal of Circuits, Systems and Computers, no. 01 (2021).

16. [US. Patent] M. Najafi, A. M. Jalilvand, M. Fazeli, ”Method and Architecture for Fuzzy-Logic Using Unary Processing.”, U.S. Patent Application 17/340,834, filed December 9, 2021.

17. [Conference] Zahra Kazemi, Amin Norollah, Afef Kchaou, M. Fazeli, David Hely, Vincent Beroulle, ”An In-Depth Vulnerability Analysis of RISC-V Micro-Architecture Against Fault Injection Attack”, to appear in proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2021.

18. [Journal] M. S. Aghadadi, M. Fazeli, H. Beitollahi, ”Joint Effects of Aging and Process Variations on Soft Error Rate of Nano-Scale Digital Circuits.”, Cryptography, no. 2 (2021).

19. [Journal] S. Kashi, A. Patooghy, M. Fazeli, ”An Energy Efficient Syn- thesis Flow for Design of Application Specific Many-Core Chip Multiprocessors”, Integration, The VLSI, 2021.

20. [Conference] A. Norollah, Z. Kazemi, N. Sayadi, H. Beitollahi M. Fazeli, David Hely, ”Efficient Scheduling of Dependent Tasks in Many-Core Real-Time System Using a Hardware Scheduler.”, proceedings of IEEE High Performance Extreme Computing Conference (HPEC), pp. 1-7, 2021.

21. [Journal] Z. Kazemi,D. Hely, M. Fazeli, V. Beroulle, ” A Review on Evaluation and Configuration of Fault Injection Attack Instruments to Design Attack Resistant MCU-Based IoT Applications”, MDPI Journal of Electronics, 9(7), July 2020.

22. [Conference] Z. Kazemi, M. Fazeli, D. Hely, V. Beroulle, ”Hardware Security Vulnerability Assessment to Identify the Potential Risks in A Critical Embedded Application”, to appear in proceedings of 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020.

23. [Journal] E. Aerabi, M. Fazeli, A. Papadimitriou, D. Hely, ”Design Space Exploration for Ultra-Low-Energy Security in IoT MCUs”, ACM Transactions on Embedded Computing, Vol. 19, No. 3, 2020.

24. [Journal] M. Taherifard, A. Patooghy, M. Fazeli, ”Scan Attack Toler- ance with Minimum Testability Loss: A Gate-Level Approach”, to appear in IET-Information Security, 2020.

25. [Conference] Z. Kazemi, C. Bresch, M. Fazeli, D. Hely, V. Beroulle, ”A Systematic Approach for Hardware Security Assessment of Secured IoT Applications”, to appear in proceedings of TRUDEVICE: Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, 2020.

26. [Journal] M. Talebi, A.M. Hosseini, M. Fazeli, ”ROCKY: A Robust Hybrid On-chip Memory Kit For Embedded Processors With STT-MRAM Cache Technology”, IEEE Transactions on Computers, 2020.

27. [Journal] A. Mansour, M. Fazeli, A. M. Rahmani, ”Protecting Scratchpad Memory Addresses against Soft Errors”, to appear in Elsevier, Journal of Microelectronics Reliability, 2020.

28. [Journal] S. Aghadadi, M. Fazeli, H. Beitollahi, ”Joint Effects of Aging and Process Variations on Soft Error Rate of Nano-Scale Digital Circuits”, Journal of Circuits, Systems, and Computers, 2020.

29. [Conference] F. Rabiee, M. Kajouyan, N. Estiri, J. Fluech, M. Fazeli, A Patooghy ”Enduring Non-Volatile L1 Cache Using Low-Retention-Time STTRAM Cells”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 322-327, 2020.

30. [Journal] A. Salahvarzi, A. M. Hosseini Monazah, M. Fazeli, K. Skadron, ”NOSTalgy: Near-Optimum Run-time STT-MRAM Quality-Energy Knob Management for Approximate Computing Applications”, to appear in IEEE Transactions on Computer, 2020.

31. [Conference] H. Jalilvand, M. H. Najafi, M. Fazeli, “Fuzzy-logic Pro- cessing using Unary Bit-Streams”, to appear in proceedings of IEEE International Symposium on Circuits and Systems, 2020.

32. [Conference] Nejat, Z. Kazemi, V. Beroulle, D. Hely, M. Fazeli, “Re- stricting Switching Activity Using Logic Locking to Improve Power Analysis- Based Trojan Detection” to appear in proceedings of 4th International Verification and Security Workshop IVSW, 2019.

33. [Journal] V. Jamshidi, M. Fazeli, ”Ultra-Low Power and Reliable Magnetic Based Interconnects for Nano-Scale Technologies”, Elsevier Microelectronics Journal, Vol. 90, PP. 39-47, 2019.

34. [Journal] A. Asad, M. Fazeli, MR. Jahed-Motlagh, M. Fathy, F. Mohammadi, ”An Energy-efficient Reliable Heterogeneous Uncore Architecture for Future 3D Chip-multiprocessors”, Journal of Circuits, Systems and Computers, P. 1950224, 2019.

35. [Journal] A. Norrollah, D. Derafshi, H. Beitollahi, M. Fazeli, ”RTHS: A Low-cost High-Performance Real-Time Hardware Sorter with Multi-Dimensional Sorting Algorithm”, to Appear in IEEE Transactions on VLSI, Vol 27, No. 7, PP. 1601-1613, 2019.

36. [Journal] M.A. Nourian, M. Fazeli, D. Hely, ”Hardware Trojan detection using an advised genetic algorithm based logic testing”, Springer Journal of Electronic Testing and Applications, Vol 34, PP. 461- 470, 2018.

37. [Journal] M. Taherifard, A. Patooghy, M. Fazeli, ”Vulnerability Mod- eling of Crypto-chips Against Scan-Based Attacks”, to Appear in IET Information Security Journal, 2018.

38. [Journal] A. Zarei, A. Patooghy, M. Fazeli, ”RFID: Robust Fault Injection Detection Method for the Advanced Encryption Standard Using Time and Information Redundancy”, Journal of Circuits, Systems and Computers, 2018.

39. [Conference] Z. Kazemi, A. Papadimitriou, D. Hely and M. Fazeli ”Hardware Security Evaluation Platform for MCU-based Connected Devices: Application to healthcare IoT” in Proceedings of 3nd International Verification and Security Workshop IVSW, Hotel Cap Roig, Platja d’Aro, Costa Brava, Spain, July 2-4, 2018.

40. [Conference] E. Aerabi, A. Patooghy, H. Rezaei, M. Mark, M. Fazeli, M. Kinsy ”MystIP: Mystifying IP Cores Using an Always-ON FSM Obfus- cation Method”, to Appear in Proceedings of ISVLSI Symposium 2018.

41. [Journal] V. Jamshidi, M. Fazeli, ”Pure Magnetic Logic Circuits: A Reliability Analysis”, IEEE Transactions on Magnetics, Vol. 54, No. 10, PP. 1-10, 2018.

42. [Journal] V. Jamshidi, M. Fazeli, ”Design of Ultra Low Power Current Mode Logic Gates using Magnetic Cells, Elsevier International Journal of Electronics and Communications, 83, 270-279, 2018.

43. [Conference] Z. Kashy, A. Patooghy, M. Fazeli, M. Kinsey, D. Rahmati, ”Application Specific Networks-on-Chip Synthesis: An Energy Efficient Approach”, Proceedings of ISVLSI Symposium 2018.

44. [Journal] E. Aerabi, M. Kaykha, M. Fazeli, A. Patooghy, A. Akbar, ”Side Channel Parameter Characteristics of Code Injection Attacks”, ISe- Cure, Int’l Journal of Information Security, January 2017, Volume 9, Number 1 (pp. 17-26).

45. [Journal] R Rajaei, B Asgari, M Tabandeh, M. Fazeli, ”Single event multiple upset-tolerant SRAM cell designs for nano-scale CMOS technology, Turkish Journal of Electrical Engineering & Computer Sciences, 25 (2), 1035-1047, 2017.

46. [Conference] F. Arezoomand, A. Asad, M.Fazeli, M. Fathy and F. Mohammadi ”Reliability and Power optimization in 3D-stacked cache using a run-time reconfiguration procedure”, to appear in Proceedings of 11th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip), Seoul, Korea, September 18-20, 2017.

47. [Conference] F. Arezoomand, M.Fazeli, M. Fathy ”Energy Aware and Reliable STT-RAM based Cache Design for 3D Embedded Chip-Multiprocessors”, 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2017), July 12-14, 2017, Madrid, Spain.

48. [Journal] V. Jamshidi, M. Fazeli, A. Patooghy, ”mGate: A universal magnetologic gate for the design of energy efficient digital circuits, to appear in IEEE Transactions On Magnetics, Vol 53, No 10m 2017.

49. [Journal] M. H. Rad, A. Patooghy, M. Fazeli, “An Efficient Program- ming Skeleton for Clusters of Multi-Core Processors, to appear in Springer International Journal of Parallel Computing, Vol. 46, No. 6, PP. 1094-1109, 2017.

50. [Conference] Seyyed Mohammad Saleh Samimi, Ehsan Aerabi, Arash Nejat, M.Fazeli, David Hely, Vincent Beroulle, ”High output hamming- distance achievement by a greedy logic masking approach”, IEEE East-West Design and Test, EWDTS 2016.

51. [Conference] A. Mirzaeyan, A. Patooghy, M.Fazeli, “A New Countermeasure Against Fault Injection Attacks for AES Based Crypto-systems”

in proceedings the 24th Iranian Conference on Electrical Engineering (ICEE), pp. 1148-1153, 2016.

52. [Conference] A. Mirzaeian, A. Patooghy, M.Fazeli, ”A Novel Countermeasure against Fault Injection Attacks for AES-based Crypto-systems”, 24th Iranian Conference on Electrical Engineering (ICEE), 2016.

53. [Conference] M.S.Samimi, E.Aerabi, Z.Kazemi, M.Fazeli, and A. Pa- tooghy, ”Hardware Enlightening: Nowhere to Hide Your Hardware Trojans”, 22nd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), Catalunya, Spain, July 4-6, 2016.

54. [Conference] M. Kamarei, A. Patooghy, M. Fazeli, ”Unauthenticated event detection in wireless sensor networks using sensors co-coverage”, ISeCure, International Journal of Information Security, Volume 8, Issue 1, Page 61-71, 2016.

55. [Journal] B. Asgari, M. Fazeli, S. V. Azhari, A. Patooghy, “A Microarchitectural Approach to Enhance Lifetime and Reliability of STTRAM based Register File in Embedded Processors, IET Computer and Digital Techniques, Volume 11, Issue 1, PP. 1-7, 2016.

56. [Journal] V. Moghaddas, M. Fazeli, A. Patooghy, “Reliability-Oriented Scheduling for Static-Priority Real-Time Tasks in Standby-Sparing Systems, Elsevier, Journal of Microprocessors and Microsystems, Volume 45, PP. 208-215, 2016.

57. [Journal] M. Ranjbar, M. Fazeli, Ahmad Patooghy, ”Phase Change Memory Lifetime Enhancement via Online Data Swapping”, Elsevier, Integration, the VLSI journal, Volume 54, PP. 47-55, 2016.

58. [Journal] S. Afsharpour, A. Patooghy, M. Fazeli, “A Performance/Energy-Aware Task Migration Algorithm for Many-Core Chips”, Volume 10, Issue 4, PP. 165-173, IET Computers & Digital Techniques journal, 2016.

59. [Conference] R. Seidipiri; A. Patooghy; S. Afsharpour, M.Fazeli, ”RASMAP: An efficient heuristic application mapping algorithm for network-on-chips” Proceedings of Eighth International Conference on Information and Knowledge Technology (IKT), 2016.

60. [Journal] H. Farbeh, N. Mirzadeh, N. Farhady, S.G. Miremadi, M. Fazeli, H. Asadi, “A Highly Reliable Cache-Assisted Scratchpad Memory”, IEEE Transaction on VLSI (IEEE-TVLSI), Volume 24, Issue 11, PP. 3296-3309, 2016.

61. [Journal] R. Rajaei , M. Fazeli, M. Tabandeh ”Soft Error-Tolerant Design of MRAM-based Non-Volatile Latches for Sequential Logics”, IEEE Transaction on Magnetics (IEEE-TMAG), Volume 51, Issue 06, 2015.

62. [Journal] R. Rajaei , B. Asgari, M. Tabandeh, M. Fazeli, ”Design of Robust SRAM Cells Against Single Event Multiple Effects for Nanometer Technologies”, IEEE Transaction on Device and Material Reliability (IEEE-TDMR), Volume 15, Issue 03, 2015.

63. [Journal] R. Rajaei, M. Tabandeh, M. Fazeli, ” Low-Cost Circuit-Level Soft Error Mitigation Techniques for Combinational Logic”, Scientia Iranica, Vol 22, No. 6, PP. 2401-2414, 2015.

64. [Journal] R. Rajaei, M. Tabandeh, M. Fazeli, ”Single Event Multiple Upset (SEMU) Tolerant Latch Designs in Presence of Process and Temperature Variations”, World Scientific, Journal of Circuits, Systems, and Computers, Volume 24, Issue 01, 2015.

65. [Conference] V. Jamshidi, M.Fazeli, and A. Patooghy, ”A Low Hybrid MTJ-CMOS (4-2) Compressor for Fast Arithmetic Circuits”, to appear in Proceedings of the 18th CSI International Symposium on Computer Architecture & Digital Systems (CADS 2015).

66. [Conference] M. Kamarei, M. Hajimohammadi, A. Patooghy, M. Fazeli, “An Efficient Data Aggregation Method for Event-Driven WSNs: A Modeling and Evaluation Approach”, To appear in Springer Wireless Personal Communications, Volume 84, No. 1, Pages 745-764, Sep. 2015.

67. [Conference] S. Rezaei, M. Fazeli, S. G. Miremadi, “Soft error estimation and mitigation of digital circuits by characterizing input patterns of logic gates, Elsevier, Journal of Microelectronics Reliability, Volume 54, Issue 6, Pages 1412-1420, 2014.

68. [Journal] R. Rajaei, M. Tabandeh, M. Fazeli, ”Soft Error Rate Estimation for Combinational Logic in Presence of Single Event Multiple Transients”, World Scientific, Journal of Circuits, Systems, and Computers, Volume 23, Issue 06, July 2014.

69. [Journal] R. Rajaei, M. Tabandeh, M. Fazeli, ”Low Cost Soft Error Hardened Latch Designs for Nano-scale CMOS Technology in presence of Process Variation”, Elsevier Journal of Microelectronics Reliability, Volume 53, Issue 6, June 2013, Pages 912-924.

70. [Conference] A. Hosseini, H. Farbeh, S. G. Miremadi, M.Fazeli, H. Asadi, ”FTSPM: A Fault-Tolerant ScratchPad Memory”, to appear in Proceedings of the 43rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2013), 24-27th June 2013, Bu- dapest.

71. [Journal] S. Yazdanshenas, M. Ranjbar Pirbasti, M. Fazeli, Ahmad Patooghy, ”Coding Last Level STT-RAM Cache For High Endurance and Low Power”, IEEE Computer Architecture Letter (IEEE-CAL), Volume 13, Issue 2, May 2013, Pages 73 - 76.

72. [Journal] H. Sarbazi-Azad, H.R. Zarandi, M. Fazeli, ”A Parallel Clustering Algorithm on the Star Graph and Its Application”, Elsevier, Journal of Mathematical and Computer Modeling, Volume 58, Issues 3 -4, Pages 886 -897, 2013.

73. [Conference] S. M. Ghafari, M.Fazeli, A. Patooghy, L. Rikhtechi, ”Bee- MMT: A load balancing method for power consumption management in cloud computing”, Proceedings of International Conference on Contemporary Computing (IC3), August 2013.

74. [Journal] M. Ebrahimi, S.G. Miremadi, H. Asadi, M. Fazeli,“A Low-Cost Scan Chain-Based Technique to Recover Multiple Errors in TMR Systems, IEEE Transactions On VLSI Systems (IEEE-TVLSI), Volume 21, Issue 8, September 2012, Pages 1454-1468.

75. [Journal] Z. Ghaderi, S.G. Miremadi, H. Asadi, M. Fazeli, ”HAFTA: Highly Available Fault-Tolerant Architecture to Protect SRAM-Based Reconfigurable Devices against Multiple Bit Upsets”, IEEE Transactions on Device and Material Reliability (IEEE-TDMR), Volume 13 , Issue 1, November 2012, Pages 203-212.

76. [Journal] H. Asadi, M. Baradaran, M. Fazeli, S. G. Miremadi, “Efficient Algorithms to Accurately Compute Logic-Electrical-Timing Derating (LETD) of Digital Circuits, Elsevier, Journal of Microelectronics Reliability, Volume 52, Issue 6, June 2012, Pages 1215-1226.

77. [Conference] S. N. Ahmadian, M.Fazeli, N. Farhadi, S. G. Miremadi, ”Value Aware Low Power Register File Architecture, Proceedings of 16th symposium on Computer Architecture and Digital Systems (CADS2012), Shiraz, Iran, May 2012 (Best Paper Award).

78. [Conference] M. A. Abazari, M.Fazeli, A. Patooghy, S.G. Miremadi, ”An Efficient Technique to Tolerate MBU Faults in Register File of Embedded Processors”, Proceedings of 16th symposium on Computer Architecture and Digital Systems (CADS2012), Shiraz, Iran, May 2012.

79. [Conference] H. Farbeh, M. Fazeli, F. Khsravi, S. G. Miremadi, “Memory Mapped SPM: Protecting Instruction Scratchpad Memory in Embedded Systems against Soft Errors , in Proceedings of Ninth European Dependable Computing Conference (EDCC 2012), Romania, May 8-11, 2012.

80. [Journal] M. Fazeli, A. Namazi, S. G. Miremadi, A. Haghdoost, “Operand Width Aware Hardware Reuse: A Low-Cost Approach to Resilient ALU design in Embedded Processors, Elsevier, Journal of Microelectronics Reliability, Volume 51, Issue 12, December 2011, Pages 2374-2387.

81. [Conference] M. Fazeli, S. N. Ahmadian, S. G. Miremadi, H. Asadi, M. B. Tahoori, “Soft Error Rate Estimation of Digital Circuits in the Presence of Multiple Event Transients (METs), to appear in Proceedings of the ACM International Conference on Design Automation and Test In Europe (DATE’11), 14-18, March, Grenoble, France.

82. [Conference] N. Farhady Ghalaty, M. Fazeli , Hossein Izadi Rad, Seyed Ghassem Miremadi: Software-based control flow error detection and correction using branch triplication. Proceedings of 17th IEEE International Symposium on On-Line Testing (IOLTS) : 214-217 Athens, Greece, July 13-15, 2011.

83. [Journal] M. Fazeli, A. Namazi, S. G. Miremadi, “Robust Register Caching: An Energy Efficient Circuit Level Technique to Protect Reg- ister File in Embedded Processors”, IEEE Transactions On Device and Material Reliability (IEEE TDMR), Volume 10, Issue 2, June 2010, Pages 208-221.

84. [Journal] Ahmad Patooghy, Seyed Ghassem Miremadi, Mahdi Fazeli, “A Low-Overhead and Reliable Switch Architecture for Network-on-Chips, Elsevier, Integration, the VLSI journal, Volume 43, Issue 3, June 2010, Pages 268-278.

85. [Conference] M. Fazeli, S. G. Miremadi, H. Asadi, S. N. Ahmadian, “A Fast and Accurate Multi-Cycle Soft Error Rate Estimation Approach to Resilient Embedded Systems Design, the 40th Annual IEEEIFIP International Conference on Dependable Systems and Networks (DSN 2010), 28 June-1 July 2010, Chicago, USA. (Student Award)

86. [Conference] M. Fazeli, S. G. Miremadi, H. Asadi, M. Baradaran Tahoori, “A Fast Analytical Approach to Multi-Cycle Soft Error Rate Estimation of Sequential Circuits, the 13th Euromicro Conference on Digital System Design (DSD 2010), Sep. 1-3, 2010, Lille, France.

87. [Journal] M. Fazeli, S. G. Miremadi, A. Ejlali, A. Patooghy, “Low Energy Single Event Upset/Single Event Transient-Tolerant Latch for Deep SubMicron Technologies”, IET (IEE) Computers & Digital Techniques journal, Volume 3, Issue 3, May 2009, Pages 289-303.

88. [Conference] M. Fazeli, A. Namazi, S. G. Miremadi, “An Energy Efficient Circuit Level Technique to protect Register File from MBUs and SETs in Embedded Processors, the 39th Annual IEEEIFIP International Conference on Dependable Systems and Networks (DSN’09), June 29- July 2, Lisbon, Portugal. (Student Award)

89. [Conference] M. H. Razmkhah, S. G. Miremadi, A. Ejlali, M. Fazeli, “A Novel SETSEU Hardened Parallel I/O Port, IEEE Circuits and Systems International Conference on Testing and Diagnosis (ICTD 2009), Apr 28- 29, 2009, Chengdu, Sichuan China.

90. [Journal] M. Fazeli, R. Farivar, S. G. Miremadi, “Error Detection En- hancement in PowerPC Architecture-based Embedded Processors, Springer, Journal of Electronic Testing: Theory and Applications (JETTA), Volume 24, Issue 3, June 2008, Pages 21-33.

91. [Conference] M. Amiri-Kamalabad, S. G. Miremadi, M. Fazeli, “A Power Efficient Approach to Fault-Tolerant Register File Design, The 21st International Conference on VLSI Design (VLSI-Design 2008), Heydarabad, India, 2008. (Won the Travel Fellowship)

92. [Conference] N. Farazmand, M. Fazeli, S.G. Miremadi, “CFEDC: Control Flow Error Detection and Correction for embedded systems without program interruption, The Third International Conference on Availability, Reliability and Security (ARES 2008), March 4-7, 2008, Barcelona, Spain.

93. [Conference] M. Fazeli, S.G. Miremadi, “A Power Efficient Masking Technique for Design of Robust Embedded Systems against SEUs and SETs, the 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2008), Cambridge, MA, 2008.

94. [Conference] M. Fazeli, S. A. Ahmadian, S.G. Miremadi, “A Low Energy Soft Error-Tolerant Architecture for Register File in Embedded Processors, 11th IEEE High Assurance Systems Engineering Symposium, (HASE 2008), Nanjing, China, 2008.

95. [Conference] M. Fazeli, S. G. Miremadi, A. Patooghy, “The Interplay of Reliability and Power Consumption in Design of SEU-Tolerant Latches for DSM Technology, 6th IEEE East-West Design & Test Symposium, (EWDTS 2008), Lviv, Ukraine, 2008.

96. [Conference] M. Fazeli, A. Patooghy, S. Gh. Miremadi, A. Ejlali, “Feedback Redundancy: A Power-Aware SEU-Tolerant Latch Design in DSM Technologies, the 37th Annual IEEEIFIP International Conference on Dependable Systems and Networks (DSN 2007), June 25-28, Edinburg, UK. (Student Award)

97. [Conference] A. Patooghy, M. Fazeli, S. G. Miremadi, “ A Low-Power and SEU-Tolerant Switch Architecture for Network on Chips, to appear in the Proceedings of the IEEE/IFIP Pacific Rim International Symposium on Dependable Computing (PRDC 2007), Melbourne, Victoria, Australia, Dec. 17-19, 2007.

98. [Conference] N. Amini, M. Fazeli, S. G. Miremadi, M. T. Manzuri, “Distance-Based Segmentation: An Energy-Efficient Clustering Hierarchy for Wireless Microsensor Networks, the Fifth Annual Conference on Communication Networks and Services Research (CNSR 2007), Frederic- ton, New Brunswick, Canada., May 2007.

99. [Conference] N. Amini, M. Fazeli, S. G. Miremadi, “A Hierarchical Routing Protocol for Energy Load Balancing in Wireless Sensor Networks, the 20th IEEE Annual Canadian Conference on Electrical and Computer Engineering (CCECE 2007), Apr. 2007, Vancouver, Canada.

100. [Conference] A. Patooghy, M. Fazeli, S. G. Miremadi, “ Reducing Power Consumption in NoC Design with no Effect on Performance and Reliability, to appear in the Proceedings of The 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2007), Marrakesh, Morocco, Dec. 11-14, 2007.

101. [Conference] A. Patooghy, S. Gh. Miremadi, A. Javadtalab, M. Fazeli1, N. Farazmand, “A solution to Single Point of Failure Using Distributed Voting, The 2nd IEEE International Symposium on Dependable, Autonomic and Secure Computing (DASC 2006), Indiana University, Purdue University, Indianapolis, USA September 29-October 1, 2006.

102. [Conference] A. Vahdatpour, M. Fazeli, S.G. Miremadi, “Transient Error Detection in Embedded Systems Using Reconfigurable Components, IEEE Symposium on Industrial Embedded Systems (IES’2006), Antibes Juan-Les-Pins, France, October 18-20, 2006.

103. [Conference] Y. Sedaghat, S. G. Miremadi, M. Fazeli, “A Software-Based Error Detection Technique Using Encoded Signatures, the 21th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2006), Arlington, Washington DC, October 4-6, 2006.

104. [Conference] A.Vahdatpour, M. Fazeli, S. G. Miremadi, “Experimental Evaluation of Three Concurrent Error Detection Mechanisms, the 18th IEEE International Conference on Microelectronics (ICM 2006), Dhahran, Saudi Arabia, December 16-19, 2006.

105. [Conference] M. Bashiri, S. G. Miremadi, M. Fazeli, “A Checkpointing Technique for Rollback Error Recovery in Embedded Systems , the 18th IEEE International Conference on Microelectronics (ICM 2006), Dhahran, Saudi Arabia, December 16-19, 2006.

106. [Conference] M. Fazeli, R. Farivar, S. G. Miremadi, “A Software-Based Concurrent Error Detection Technique for PowerPC Processor-based Embedded systems, the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2005), Monterey, California, 2005.

107. [Conference] M. Fazeli, R. Farivar, S. Hessabi, S. G. Miremadi, “A Fault Tolerant Approach to Object Oriented Design and Synthesis of Embedded Systems, The Second Latin-American Symposium on Dependable Computing (LADC 2005), to be published by Springer-Verlag LNCS Series, Volume 3747, 2005, P.143, Salvador, Brazil, October 25-28, 2005.

108. [Conference] R. Farivar, M. Fazeli, S. G. Miremadi, “Directed Flooding: A Fault-Tolerant Routing Protocol for Wireless Sensor Networks, International Conference on Sensor Networks (SENET 2005), Montreal, Canada, August 14, 2005.

109. [Conference] R. Farivar, M. Fazeli, H. Sarbazi-Azad, “A Cordic-Based Processor Extension for Scalar and Vector Processing, (IPDPS-PDSEC 2005), The 6th international workshop on parallel and distributed scientific and engineering computing, Denver, Colorado, USA, April 8, 2005.

110. [Conference] M. Fazeli, H. Sarbazi-Azad, R. Farivar, “Parallel Clustering on the Star Graph, The 6th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP 2005), published by Springer-Verlag LNCS Series, Melbourne, Australia, 2005.