Known wiring diagrams
Embedded Files
Commando Alarm Schematics
Charm Li Schematics
If you are unable to touch the buttons correctly, do the following:
Turn the ignition off, then place all five fingers on the screen, then turn the ignition back on to calibrate. This will display the calibration screen shown on the right.
Other Radios respond by placing palm flat against the display which opens same calibration screen
Supposedly these points reboot into recovery on the models in the image:
The following was generated with AI photos of silkscreen used at your own risk:
8227L / F9212B Board Pin Reference
8227L / F9212B Board Pin Reference
Board IDs observed:
002676-007-T92-10 — dated 2022-04-08 (original target board)
002706-003-F92-03 — dated 2022-12-28 (near-identical reference board, photographed)
Both are AC8227L (AutoChips/MediaTek) based Android car head unit platforms. Pin functions are identical across revisions; exact pad locations may vary slightly.
SoC & Platform
SoC & Platform
Item
Detail
CPU
AutoChips AC8227L (ARM Cortex-A7 quad-core @ 1.2–1.3 GHz)
Architecture
MediaTek MT62xx derived
PMIC
MediaTek MT6323
RAM
1–2 GB DDR3 (Samsung K4B4G0446D observed)
Storage
eMMC (Samsung or Kingston 16–32 GB)
Audio Amp
TDA7851 or TDA7388 (board dependent)
MCU
Secondary MCU (GD32 ARM Cortex-M0+) handles CAN, SWC, power sequencing
Complete Pin List
Complete Pin List
Power — Internal Rails (PCB)
Power — Internal Rails (PCB)
Pin
Function
Voltage
Notes
VCC
Main logic supply
3.3V
Regulated on-board
D3.3V / 0.3V·3.3V
Digital 3.3V rail
3.3V
Supplies GPIO and I/O peripherals
VRF18
RF/analog voltage reference
1.8V
Feeds RF front-end precision reference
VRF33
RF/analog voltage supply
3.3V
Second RF rail; both VRF18 and VRF33 present on T92 board
2V8
2.8V supply rail
2.8V
Powers camera I/F, display driver, I/O level shifters
VRTCO
RTC oscillator supply voltage
1.8V
Powers the real-time clock oscillator circuit
Power — Vehicle Harness (External)
Power — Vehicle Harness (External)
Pin
Function
Voltage
Notes
+14.4V
Battery positive input
12–14.4V
Permanent supply from car battery
B+
Battery positive (alternate label)
12–14.4V
Same net as +14.4V on some connectors
ACC
Accessory switched power
12V
Switches on with ignition; wakes the unit
ILL
Illumination input
0–12V
Connects to headlight circuit; dims display at night
GND
Chassis ground
0V
All grounds tie here
Audio — Speaker Outputs
Audio — Speaker Outputs
All speaker outputs are differential BTL (Bridge-Tied Load) from the onboard amplifier IC.
Pin
Function
FL+ / FL-
Front Left speaker ±
FR+ / FR-
Front Right speaker ±
RL+ / RL-
Rear Left speaker ±
RR+ / RR-
Rear Right speaker ±
MIC+ / MIC-
Differential microphone input (for Bluetooth hands-free)
TFT+ / TFT-
TFT backlight LED power ± (constant-current driver, not audio despite notation)
RF / Antenna
RF / Antenna
Pin
Function
Notes
ANT_P
Antenna power control
Switched 12V output to active FM/AM antenna or booster
AD
Antenna detect / analog input 1
Detects antenna presence; also used for analog voltage sensing
AD2
Antenna detect / analog input 2
Second antenna detect or auxiliary analog input
IN
Auxiliary input / AV detect
Reverse camera or AV presence sense line
Clocks (Internal SoC Test Points)
Clocks (Internal SoC Test Points)
Pin
Function
Notes
MCKC
MCU clock
Clock signal for the secondary MCU subsystem
MCLK
Master clock
26 MHz crystal-derived main reference clock for SoC
MEMPLL
Memory PLL
DDR memory clock generated by internal PLL; test point to verify DRAM timing
CK2
Secondary clock output
Divided or alternate clock domain for peripherals or co-processors
SRC_KCNA
Sleep Reference Clock Enable
MTK SRCLKENA — output from AP SoC to PMIC. High = oscillator needed (active), Low = allow sleep/power-down. Controls 32 kHz reference oscillator enable during power state transitions.
WATCHDOG
Watchdog timer output
Secondary MCU pulses this; if SoC stops toggling it, MCU triggers full system reset
B01
Boot mode strap
Pull to GND at power-on to force alternate boot mode (e.g. download mode)
233
PCB silkscreen reference marker
Not a signal — pad/zone reference number on board
JTAG Debug Port (Full 4-wire)
JTAG Debug Port (Full 4-wire)
All four JTAG signals are exposed as test pads, typically grouped on or near the 22-pin gold dual-row header.
Pin
IEEE 1149.1 Name
Function
JTCK
TCK
JTAG clock input to the debug TAP controller
JTDI
TDI
JTAG data input — serial data from debugger into the SoC
JTDO
TDO
JTAG data output — serial data from SoC to debugger/programmer
JTMS
TMS
JTAG mode select — controls TAP state machine transitions
Use with an ARM JTAG probe and MTK-compatible debugger. Full chip-level debug and recovery possible via this interface.
UART Debug & Internal Communication
UART Debug & Internal Communication
Pin
Function
Notes
PRINT_TX
Debug UART transmit
Serial console output from SoC. MTK factory/dev log port at 115200 baud. Connect a 3.3V USB-UART adapter here to read boot logs.
PRINT_RX
Debug UART receive
Accepts commands into SoC over debug console
TX
Internal UART transmit (SoC → MCU)
Same function as INT_TX — carries data from Android SoC to secondary MCU
RX
Internal UART receive (MCU → SoC)
Same function as INT_RX — carries CAN events, SWC keypresses, ignition state from MCU to SoC at 19200 baud 8N1
Reset & Boot Control
Reset & Boot Control
Pin
Function
Notes
RST
System reset
Active-low hard reset of the main SoC (Android CPU)
KRST
MCU/kernel reset
Resets the secondary MCU independently of Android
B01
Boot strap
See Clocks section above
I²C Bus & Interrupts
I²C Bus & Interrupts
Pin
Function
Notes
SCL
I²C clock
Connects to touch controller, audio DSP, or other I²C peripherals
SDA
I²C data
Paired with SCL
EIN
External interrupt input
Same as EINT — general-purpose interrupt from peripheral (touch panel, GPS chip) into SoC
Configuration
Configuration
Pin
Function
Notes
HWC
Hardware config strap
Resistor-divided analog input sampled at boot; selects board variant (screen resolution, audio codec, feature flags). Sets permanent hardware identity.
User Controls
User Controls
Pin
Function
Notes
KEY1
Volume Up / Steering wheel control 1
Resistive analog input. Pull to GND = button press. Used for recovery mode entry and navigation.
KEY2
Volume Down / Steering wheel control 2
Resistive analog input. Pull to GND = button press. Recovery menu navigation.
IR0
Infrared receiver input
Demodulated signal from IR remote sensor
LED-P
LED power output
Front panel button illumination supply
P01
GPIO 1
General purpose — amplifier mute, camera trigger, or accessory switching
P06
GPIO 6
General purpose — same use cases as P01
Physical Debug Interfaces
Physical Debug Interfaces
1. Left Edge Header (User Controls & I/O)
1. Left Edge Header (User Controls & I/O)
Populated pin header on left edge of board. Top to bottom:
TFT+
TFT-
MIC+
MIC-
LED-P
GND
KEY1
KEY2
KRST
RST
D3.3V / 0.3V
EIN
SDA
SCL
P01
P06
2. 22-Pin Gold Dual-Row Header
2. 22-Pin Gold Dual-Row Header
Combined debug/programming header. Contains:
Full JTAG: JTCK, JTDI, JTDO, JTMS
UART debug: PRINT_TX, PRINT_RX
Internal UART: TX, RX
Clock test points: MEMPLL, CK2, MCKC
Power references: VRF18, VRF33, 2V8, VRTCO
GND, SRC_KCNA, WATCHDOG, B01
Attach MTK debug cable or JTAG probe here.
3. DDR Pad Sequences (Top & Bottom, 1–9 each)
3. DDR Pad Sequences (Top & Bottom, 1–9 each)
Two rows of 9 bare solder pads each for direct eMMC/DDR memory access. Used with a programmer to dump or rewrite the eMMC at chip level. Required if the eMMC has failed or been corrupted beyond software recovery.
4. Bottom Edge Connector (Vehicle Harness)
4. Bottom Edge Connector (Vehicle Harness)
Solder pad strip along bottom edge. Left to right:
GND +14.4V B+ ACC IN AD AD2 ANT_P FR- FR+ FL+ FL- RL- RL+ RR+ RR- ILL
Recovery Mode
Recovery Mode
Method 1 — Software (device still boots)
Method 1 — Software (device still boots)
Use ADB: adb reboot recovery Or from Settings → Backup & Reset if accessible.
Method 2 — Hardware Button Simulation (no physical buttons)
Method 2 — Hardware Button Simulation (no physical buttons)
Recovery requires KEY1 held during power-on.
Action
How
Enter recovery
Short KEY1 to GND while applying power
Navigate up
Momentary short KEY1 to GND
Navigate down
Momentary short KEY2 to GND
Select / Confirm
Momentary short RST to GND
All KEY pins are resistive analog inputs — a direct momentary short to GND simulates a button press. No soldering needed if header pins are accessible; use tweezers or a jumper wire.
Method 3 — SP Flash Tool + Test Point (preloader wiped / bricked)
Method 3 — SP Flash Tool + Test Point (preloader wiped / bricked)
Open the unit and locate KPCOL0 test point (near SoC, may be under RF shield)
Attach a wire to any GND point (GPS connector, antenna shell, etc.)
Open SP Flash Tool on PC, load scatter file, click Download — tool waits for device
Apply 12V power to board
Briefly touch wire from GND to KPCOL0 test point — Windows USB chime = success
Flashing begins automatically
On subsequent passes (preloader already restored) test point is not needed again
Preloader warning: Only flash preloader if you are certain of the correct file for your exact board revision. Wrong preloader = hard brick.
Method 4 — JTAG (last resort)
Method 4 — JTAG (last resort)
Use the 22-pin gold header. Connect JTCK, JTDI, JTDO, JTMS, GND to an ARM JTAG probe. Use MTK ISP tool or OpenOCD for full chip-level access.
Troubleshooting
Troubleshooting
Symptom
Check
No power
Verify 12V at B+/+14.4V. Check onboard fuse near power connector. Check GND continuity.
Overcurrent trip
Short circuit — inspect for solder bridges near power input. Check reverse-protection diodes.
No 3.3V / 1.8V rails
Check MT6323 PMIC and switching regulators. Scope for switching pulses.
No UART output on PRINT_TX
Confirm 3.3V USB-UART adapter, 115200 baud, 8N1. Try grounding B01 to force download mode.
Black screen / no display
Check TFT+/TFT- backlight drive. Verify display FPC cable seated.
No audio
Verify amp IC has +12V. Check amp mute pin. Swap speaker pairs to isolate chip vs wiring.
Stuck in recovery, can't navigate
Use KEY1/KEY2 to GND method above — USB keyboard and touchscreen do not work in recovery on most units.
SP Flash Tool not detecting
Some boards need both 12V power AND USB simultaneously. Try toggling RST while tool is waiting.
DRAM_FAIL (5054) error
Wrong firmware for RAM size. Match preloader to actual RAM: preloader_1g.bin, preloader_2g.bin, etc.
Board Identity
Board Identity
Label
Meaning
002676-007-T92-10
PCB part number / BOM revision (target board)
002706-003-F92-03
PCB part number / BOM revision (reference photos)
2022-04-08
Manufacture / firmware stamp date (target board)
2022-12-28
Manufacture / firmware stamp date (reference photos)
F9212B
Platform model — firmware files exist as gongban_F9212B_S_1024x768
_00020
Car Info model code indicating 9212B/11B platform
Notes
Notes
All SoC-level I/O is 3.3V TTL on GPIO lines and 1.8V on core/clock lines — do not apply 5V to any test point
PRINT_TX/PRINT_RX require a 3.3V USB-UART adapter — a 5V adapter will damage the board
Speaker outputs are high-voltage AC — do not probe with a multimeter; use an oscilloscope or speaker load
The secondary MCU communicates with the SoC at 19200 baud, 8N1 on the TX/RX pins
SRC_KCNA (SRCLKENA) is an output from the SoC — do not drive it externally
WATCHDOG is also an output — the MCU reads it, do not connect to ground
8227L / F9212B Board — Chip Identification from Photos
8227L / F9212B Board — Chip Identification from Photos
Boards photographed:
002676-007-T92-10 — dated 2022-04-08 (target board, no photos)
002706-003-F92-03 — dated 2022-12-28 (reference photos, near-identical)
All chip identifications below are read directly from the 4 photos provided (IMG_0527–IMG_0530). Where a chip is confirmed by board ID but not directly readable in photos, it is flagged accordingly.
Main SoC
Main SoC
Chip
Package
Visible in Photos
Notes
AutoChips AC8227L
BGA (under metal shield)
No — under thermal pad/shield
Confirmed by board silkscreen markings and board ID. ARM Cortex-A7 quad-core @ 1.2–1.3 GHz. MediaTek MT62xx derived architecture. Large black epoxy area visible under heatsink pad in Image 4.
RAM (DDR3)
RAM (DDR3)
Two Samsung DDR3 chips are clearly visible and readable across Images 1–3.
Upper RAM Chip
Upper RAM Chip
Field
Value
Part Number
K4B2G0446D
Manufacturer
Samsung Semiconductor
Type
DDR3 SDRAM
Capacity
2Gb (256MB) per chip
Package markings
GEK13ADP G / SEC 31G HYH9
Visible in
Images 1, 2, 3
Lower RAM Chip
Lower RAM Chip
Field
Value
Part Number
K4B2G0446D
Manufacturer
Samsung Semiconductor
Type
DDR3 SDRAM
Capacity
2Gb (256MB) per chip
Package markings
GEK13ADP G / SEC 30T HYH9
Visible in
Images 2, 3
Total RAM: Two x K4B2G0446D = 512MB total (or if 4Gb density variant, 1GB total). The 31G and 30T suffixes are Samsung date/lot codes, not capacity indicators. Confirm actual capacity from Android Settings → About → RAM.
Audio Amplifier
Audio Amplifier
Field
Value
Part Number
CD3313E0-60A73J2
Package
QFP (clearly readable in Image 4)
Function
4-channel audio power amplifier
Drives
FL+/FL−, FR+/FR−, RL+/RL−, RR+/RR− speaker outputs
Visible in
Image 4 (bottom center, large QFP)
Notes
Replaces TDA7388 or TDA7851 on some board revisions. Passive filter components (1AM, 222, JF, 101) visible on output lines in same image.
PMIC
PMIC
Chip
Package
Visible in Photos
Notes
MediaTek MT6323
QFN (under shield)
No — confirmed by platform documentation
Generates all internal voltage rails: 5V, 3.3V, 1.8V. Handles SRCLKENA handshake with SoC. Manages watchdog, reset sequencing, and RTC supply (VRTCO).
Secondary MCU
Secondary MCU
Field
Value
Part
Small QFP, markings not fully legible in photos
Likely ID
GD32F103 (ARM Cortex-M0+) or similar
Function
Handles CAN bus, steering wheel controls (KEY1/KEY2), power sequencing, watchdog toggling, ignition sense
Communicates with SoC via
TX/RX UART at 19200 baud, 8N1
Visible in
Images 2, 3 (small QFP near JTAG/EINT cluster)
Reset pin
KRST (resets this MCU independently of Android)
Power Section Components
Power Section Components
All visible in Image 4, lower-left and center areas.
Marking
Type
Function
2R2 (x2)
SMD Inductor 2.2µH
Switching power converter inductors for DC-DC regulation
B5S
SOT-23 transistor/MOSFET
Small signal switching, likely in power path or antenna control
0534
SOT package MOSFET
Power switching — likely ACC or antenna power control
JF
SMD passive
Filter component on audio output lines
101
SMD resistor/filter
100Ω filter on output lines
222
SMD capacitor/filter
2.2nF filter, audio output EMI suppression
1AM
SMD component
Small signal component, audio or power filter
Connectors & Headers (Visible in Photos)
Connectors & Headers (Visible in Photos)
Connector
Description
Location in Photos
Pins
Large FPC
Display interface
Left edge, all images
~30–40 pin flat cable
Small FPC x2
Camera inputs (rear/front)
Upper area, Images 2–3
~6–10 pin each
White JST header
Left edge I/O (KEY1, KEY2, MIC, etc.)
Left side, all images
See README pin list
22-pin gold dual-row
Debug/programming header
Center-right, Images 2–3
JTAG + UART + clock test points
Bottom solder pads
Vehicle harness (power + audio)
Bottom edge, Images 1, 4
GND, +14.4V, ACC, speakers, ANT_P, ILL
DDR pad sequence top
eMMC/DDR direct access
Center board
9 pads
DDR pad sequence lower
eMMC/DDR direct access
Center board
9 pads
Chip Location Map (Approximate)
Chip Location Map (Approximate)
┌─────────────────────────────────────────────────────────────┐
│ [FPC Display] [DDR3 #1: K4B2G0446D] [MCU QFP] [22-pin]│
│ [DDR3 #2: K4B2G0446D] [JTAG pads] │
│ [FPC Camera] [PRINT_TX area] │
│ [AC8227L SoC] │
│ [Left Header] (under shield) [MT6323 PMIC] │
│ KEY1/KEY2 (under shield) │
│ MIC/LED/RST │
│ [CD3313E0 Amp QFP] [Power MOSFETs] │
│ [2R2][2R2] inductors [B5S][0534] │
├─────────────────────────────────────────────────────────────┤
│ GND +14.4V B+ ACC IN AD AD2 ANT_P FR± FL± RL± RR± ILL │
└─────────────────────────────────────────────────────────────┘
Package Marking Decoder (Samsung DDR3)
Package Marking Decoder (Samsung DDR3)
Samsung DDR3 package markings follow this format:
K4B2G0446D ← Part number
GEK13ADP G ← Speed/revision suffix
SEC 31G HYH9 ← SEC = Samsung, 31G = week/year (week 31, 201G), HYH9 = fab/lot
31G and 30T = manufacturing date codes (not capacity)
K4B2G0446D = 2Gb density, x16 bus width, DDR3-1333/1600
Summary Table — All Chips
Summary Table — All Chips
#
Chip
Function
Readable in Photos
1
AC8227L
Main SoC / CPU
No (under shield)
2
MT6323
PMIC
No (under shield)
3
K4B2G0446D
DDR3 RAM #1
Yes — Images 1, 2, 3
4
K4B2G0446D
DDR3 RAM #2
Yes — Images 2, 3
5
CD3313E0-60A73J2
Audio amplifier
Yes — Image 4
6
GD32 / unknown QFP
Secondary MCU
Partially — Images 2, 3
7
0534 MOSFET
Power switching
Yes — Image 4
8
B5S transistor
Signal switching
Yes — Image 4
Notes
Notes
The two DDR3 chips are identical part numbers — this is normal; both feed the same memory bus
CD3313E0 is a Chinese-manufactured amp IC — datasheet available from CONSONANCE or similar Chinese IC vendors
The secondary MCU markings are too small to read clearly in these photos — a macro shot of that QFP would confirm the exact part
The MT6323 PMIC and AC8227L SoC are both under metal RF shields and cannot be read without removing the shields
A closer macro shot of the 22-pin gold header area and the secondary MCU would complete the identification
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