Mao-Hsu Yen, Yih-Hsia Lin, Tzu-Feng Lin, Yu-Hui Chen, Yuan-Fu Ku, Chien-Ting Kao, "Chip Design of Multithreaded and Pipelined RISC-V MCU,"7th International Conference on Knowledge Innovation and Invention 2024 (ICKII 2024), Aug. 2024.
Mao-Hsu Yen, Cheng-Hao Tsou, Tzu-Feng Lin, Yih-Hsia Lin, Yuan-Fu Ku, Chien-Ting Kao, "VLSI Implementation of RISC-V MCU with variable stage pipeline,"6th IEEE International Conference on Knowledge Innovation and Invention 2023, Aug. 2023*.*
Mao-Hsu Yen, Tzu-Feng Lin, Cheng-Hao Tsou, Yan-Wei Yu, Yih-Hsia Lin, Yuan-Fu Ku, Chien-Ting Kao, "FPGA Design of RISC-V MCU Collaborative Industrial Printer Control System,"6th IEEE International Conference on Knowledge Innovation and Invention 2023, Aug. 2023*.*
嚴茂旭、楊翔鈞、林憶霞、古元富、高健庭， “ 即時通用影像量測平台與傳輸認證晶片的設計與實現,” 2023追求高教卓越國際學術研討會。
PO-YEN HUANG, MAO-HSU YEN, YU-TZU CHANG, MENG-HAN LIN, YAN-WEI YU, YUN-HUA TSENG, "Time-Delay Integration Architecture of CMOS Image Sensor for Low Power Design," International Conference on Astronautics and Space Exploration (iCASE), Nov. 2022.
Mao-Hsu Yen, Cheng-Hao Tsou, Ssu-Chi Lin, Che-Wei Chang, Yih-Hsia Lin, Yuan-Fu Ku, Chi-Lin Chiang, "VLSI Implementation of RISC MCU with In-Circuit Debuggger," 5th IEEE International Conference on Knowledge Innovation and Invention 2022, Jul. 2022*.*
Chi-Lin Chiang, Mao-hsu Yen, Che-Wei Chang, Yih-Hsia Lin, Yuan-Fu Ku, "FPGA Implementation of ARM MCU with five-stages pipeline," 5th IEEE International Conference on Knowledge Innovation and Invention 2022, Jul. 2022*.*
Mao-Hsu Yen, Yan-Wei Yu, Che-Wei Chang, Yih-Hsia Lin, Min-Zheng Liu, Ssu-Chi Lin, Chia-Hung Su, "FPGA Implementation of RISC MCU with In-Circuit Debugger," 2021 International Conference on Information Technology and Industrial Application (ITIA 2021), Mar. 2021.
Mao-Hsu Yen, Ssu Chi Lin, Yen-Yu Chen, Che-Wei Chang, Yih-Hsia Lin, Chia-Hung Su, " Design and FPGA Implementation of NTOU16F15323 MCU with In-Circuit Debugger," 2021 International Conference on Information Technology and Industrial Application (ITIA 2021), Mar. 2021.
Mao-Hsu Yen , Yen-Yu Chen, Ssu-Chi Lin , Che-Wei Chang , Chia-Hung Su, Yih-Hsia Lin, "Design and FPGA Implementation of NTOU18F2410 MCU with SPI Communication Module ," 2021 International Conference on Information Technology and Industrial Application (ITIA 2021), Mar. 2021.
Ta-Yeh Lin , Shuw-Guann Lin , Yin-Cheng Chang , Chaoping Hsieh , Mao-Hsu Yen , Yih-Hsia Lin , Yan-Wei Yu, "Design of Millimeter-Wave Patch Array by Using TSV-Based III-V IPD Technology," 2021 Asia Pacific International Symposium on Electromagnetic Compatibility (APEMC 2021), Sep. 2021.
Yin-Cheng Chang , Ta-Yeh Lin , Chaoping Hsieh , Mao-Hsu Yen , Yih-Hsia Lin , Yan-Wei Yu , Yuan Fu Ku , Che-Wei, "Technique of Measuring Injection Locking of VCO," 2021 Asia Pacific International Symposium on Electromagnetic Compatibility (APEMC 2021), Sep. 2021.
Po-Yen Huang, Ling Jer, Mao-Hsu Yen and Yuan-Xin Xiao. "The Implementation of Time Delay Integrator on Image Sensor." International Conference on Astronautics and Space Exploration (iCASE 2019). National Space Organization, Taiwan, November 12-14, 2019.
Yin-Cheng Chang, Ta-Yeh Lin, Chaoping Hsieh, Shawn S. H. Hsu, Mao-Hsu Yen, Jian-Li Dong, Da-Chiang Chang," Discrete 1_ Probe by Using Flip-Chip IPD Resistor and Amplifier for Inspecting EMI of a Packaged IC," IEEE CPMT 2019. (Kyoto Japan)
Yin-Cheng Chang, Ping-Yi Wang, Hsu-Feng Hsiao, Ta-Yeh Lin, Shuohung Hsu, Mao-Hsu Yen, MingShan Lin, Da-Chiang Chang, "EMS Characterization of LDO with On-chip Decaps by Using Direct RF Power Injection Method," 2018 *IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition,* August 29-31, 2018, Nagoya, Aichi, Japan.
CHANG YIN-CHENG, LIN TA-YEH, WANG PING-YI, HSU Shawn S. H., YEN Mao-Hsu, CHANG DA-CHIANG, "Implementation of Certified 150-O Voltage Probe for IEC 61967-4 Conducted Electromagnetic Emission Measurement," Conference on Precision Electromagnetic Measurements, July 8-13, 2018 PARIS, FRANCE.
Mao-Hsu Yen, Bo-Hao Peng,*, Wei-Chung Chen, Liang-Yang Lin, Chia-Hung Su, Yih-Hsia Lin , Yin-Cheng Chang and Da-Chiang Chang, "FPGA Implementation of PIC16LF1826 MCU," Global Conference on Engineering and Applied Science (2018 GCEAS), Tokyo, Japan, July 10-12, 2018.
嚴茂旭、余振豪、林憶霞、章殷誠、洪浚譯、蘇家弘、詹祁叡、黎海熙， “ PIC18F4520架構設計與實現,” 2018 能源科技產品暨檢測技術論文研討會。
嚴茂旭、胡有值端、張大強、章殷誠、林憶霞、洪浚譯、蘇家弘， “即時通用影像量測平台的設計與實現,” 2018 能源科技產品暨檢測技術論文研討會。(論文比賽第一名)
嚴茂旭, 盧世彬, 林良陽, 蘇家弘, 林憶霞, "PIC16F676微控制器架構設計與晶片實現," 2018 資訊系統與數位科技研討會, 屏東，台灣.
Mao-Hsu Yen, Ming-Yang Shyu*, Arthur Tsai, Yeong-Chang Maa, Yih-Hsia Lin, "Novel Switch Block for Three-Dimensional FPGA Design," International Symposium on Engineering and Applied Science (ISEAS), Osaka, Japan , p.269-279, 2017.
Mao-Hsu Yen, Wei-Jui Cheng,*, Chiu-Kuo Chen, Chia-Hung Su, Shih-Bin Lu, Yin-Cheng Chang and Da-Chiang Chang, "VLSI Implementation of PIC16f84 MCU with In-system Programming," International Symposium on Engineering and Applied Science (ISEAS)), Osaka, Japan, p.280-290, 2017.
Yin-Cheng Chang, Ping-Yi Wang, Shawn S. H. Hsu, Mao-Hsu Yen, Yen-Tang Chang, Chiu-Kuo Chen , Ta-Yeh Lin and Da-Chiang Chang, "Implementation of Chip-Level EMC Strategies in 0.18 µm CMOS Technology," Seoul, Korea, p.390-392, APEMC 2017.（best paper award）
B.-S. Chen, R.-Y. Huang, H.-Y. Lu, and M.-H. Yen, S.-H. Chang, and I. A. Parinov“Fast symbol detection for massive G-STBC MIMOs,” in Proc. of IEEE OCEANS17, 5 pages, Aberdeen, June 2017. (EI)
B.-S. Chen, R.-Y. Huang, H.-Y. Lu, M.-H. Yen “Fast group detection schemes for massive MIMOs,” in Proc. IEEE VTS Asia Pacific Wireless Communications Symposium (APWCS), Tokyo, Japan, 5 pages, Aug. 2016.
Yin-Cheng Chang, Ta-Yeh Lin, Ping-Yi Wang, Shawn S. H. Hsu, Mao-Hsu Yen, Yen-Tang Chang, Ming-Shan Lin and Da-Chiang Chang, " The Design of Current Probe in the IEC Conducted Emission Measurement above 1 GHz," 2016 International Symposium on Antennas and Propagation (ISAP2016), Okinawa, Japan, pp 938-939
Mao-Hsu Yen, Pei-Jung Tsai, Yeong-Chang Maa Chiu-Kuo Chen, Yen-Tang Chang, "VLSI Implementation of 8051 MCU with Decoupling Capacitor for IC-EMC," 2016 the 5th Asia-Pacific International Congress on Engineering & Natural Sciences (APICENS 2016), Okinawa, Japan, Aug. 2016, pp. 276-285.
嚴茂旭, 胡有值端, 馬永昌, 黃政諺, 陳秋國, 謝樹明, "通用螺旋型彈簧影像量測系統," 第 11 屆 海峽兩岸計量學術研討會 .
Shu-Ming Hsieh, Mao-Hsu Yen, Li-Jen Kao, “Semantic-Based Graph Data Anonymization for Big Data Analysis,” International Conference on Machine Learning and Cybernetics, Jeju Island, South Korea, p.600-605, 2016 .
嚴茂旭, 鄭暐叡*,林憶霞, 馬永昌, 彭博豪, 陳秋國, "IC-EMC測試平台之PIC MCU設計," 能源科技產品檢測技術論文研討會, 2016.
Yeong-Chang Maa, Mao-Hsu Yen, Ying-Shin Lai. "The Public Transit Navigation System Combined with Real-Time Road Conditions and Carpooling Platform." 2016 International Computer Symposium (ICS 2016), Chiayi, Taiwan, Dec 2016.
Mao-Hsu Yen, Huang-Kuang Yen, Yih-Hsia Lin, Pei-Ting Huang, and Pei-Jung Tsai, “Comparison between Routabilities of State-of-the-art Designs of Switch Blocks in FPGA,” VLSI Design/CAD symposium, 2015.
Yin-Cheng Chang, Ping-Yi Wang, Shuohung Hsu, Mao-Hsu Yen, Yen-Tang Chang, Chiu-kuo Chen and Da-Chiang Chang , “Design of the Multifunction IC-EMC Test Board with Off-Board Probes for Evaluating a Microcontroller,” 2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC 2015).
Mao-Hsu Yen, Wei-Chih Lin, Yeong-Chang Maa and Hung-Kuan Yen and Pei-Jung Tsai, “VLSI Implementation of FPGA Design using Water-Molecule-Shaped Switch Block,” International Conference on Information Technology and Engineering, p157-p165, 2015, best paper award.
Mao-Hsu Yen,Chang-Hsien Chung, Wei-Chung Chen, Chiu-Kuo Chen, Yen-Tang Chang, "VLSI Implementation of 8051 MCU for IC-EMC Testing Platform," International Conference on Information Technology and Engineering, p166-p173, 2015.
Mao-Hsu Yen, Yeong-Chang Maa, Yih-Hsia Lin, Chih-Chen Lai and Shu-Ping Zheng “VLSI Implementation of 8051 MCU with In-System Programming,” International Computer Symposium, pp. 308-314, 2014.
Haw-Yun Shin; Fu-Min Hsu; Kuo-Hui Tsai; Mao-Hsu Yen, "Access popularity based wireless broadcasting mechanism," 2014 International Conference on Machine Learning and Cybernetics, Volume: 1, Pages: 65 - 70, 2014.
Yeong-Chang Maa, Mao-Hsu Yen, Yi-Chin Li, and Ying-Shin Lai “Using Wi-Fi Direct to Assist Real-Time Traffic Conditions Delivery,” International Computer Symposium, 2014.
Mao-Hsu Yen, Hung-Kuan Yen, Yeong-Chang Maa, Ming-Yang Xu, Shu-Ping Zheng “Design of a New Hyperuniversal Switch Block for FPGA Chip” The 25th VLSI Design/CAD Symposium 2014/8/5.
Mao-Hsu Yen, Yeong-Chang Maa, Yu Chu, Wen-Shine Liu, Lee-An Chu (2012, Aug). Hyper-Universal Ring Switch Box for FPGA Design. VLSI Design/CAD symposium, 2012.
Mao-Hsu Yen, Yeong-Chang Maa, James Chan, Zheng-Yan Huang, Yan-Ling Lin (2011, Dec). R-radius Corner Detection by Using Circular Mask. 2011 National Computer Symposium (NCS 2011). NSC 98-2221-E-019-022.
Yeong-Chang Maa, Mao-Hsu Yen (2011, Dec). Design and Analysis of Multipath Oriented Branch Predictors. 2011 National Computer Symposium (NCS 2011).
Chu Yu, Yi-Ting Liao, Chien-Hung Kuo, Mao-Hsu Yen, and Sao-Jie Chen (2011, Nov). Low-Power Variable-length Pipeline FFT/IFFT Processor for OFDM-based Communication Systems. 2011 VLSI Design/CAD Symposium.
Mao-Hsu Yen, Hoang-Yang Lu, Wen-Shine Liu, and Chang-Tu Wu (2011, Aug). A Generic Three-Sided Rearrangeable Switching Network for FPGA Routing. 2011 VLSI Design/CAD Symposium.
Chu Yu, Chien-Hung Kuo, Cheng-Hang Sung, Mao-Hsu Yen, and Sao-Jie Chen (2011, Jan). Design of a Low-Power OFDM Baseband Receiver for Wireless Communications. IEEE Int’l Conference on Consumer Electronics.
Chu Yu, Yi-Ting Liao, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen (2011, Jan). A Novel Low-Power 64-point Pipelined FFT/IFFT Processor for OFDM Applications. 2011 IEEE International Conference on Consumer Electronics (ICCE 2011), Las Vegas, Nevada, USA.
Y. Chu, Y. T. Liao, M. H. Yen, P.A. Hsiung, and S.-J. Chen (2011, Jan). A Novel Low-Power 64-Point Pipelined FFT/IFFT Processor for OFDM Applications. Proceedings of the IEEE International Conference on Consumer Electronics (ICCE, Las Vegas, USA).
Yeong-Chang Maa, Mao-Hsu Yen, Shu-Min Kuo, Chun-Hung Wang (2010, Dec). Cost-Effective Branch Prediction by Combining Hedging and Filtering. International Computer Symposium, ICS 2010.
Yeong-Chang Maa, Mao-Hsu Yen, Yu-Tang Wang (2010, Dec). Evaluating and Improving Variable Length History Branch Predictors. International Computer Symposium, ICS 2010..
Mao-Hsu Yen, Bing-Kun Chan, Chun-Ran Huang, Chih-Hao Ting, Zheng-Yan Huang (2010, Oct). A Rearrangeable Hierarchical Interconnection Structure for FPGA Routing Resource. 2010 Conference on Innovative Applications of System Prototyping and Circuit Design,PAL2010. NSC 98-2221-E-019-022.
Mao-Hsu Yen, Chu Yu, Kuang-Yu Shie, Yu-Hsiang Huang, Jiun-Liang Lin (2010, Oct). Implement an SDR Platform by Using GNU Radio and USRP. 2010 Conference on Innovative Applications of System Prototyping and Circuit Design,PAL2010. NSC 98-2221-E-019-022.
Mao-Hsu Yen, Yeong-Chang Maa, Bing-Kun Chan, Wei-Heng Chen, Chih-Hao Ting (2010, Oct). Wavefront Architecture for Computing the Dynamic Space Warping Algorithm. 2010 Conference on Innovative Applications of System Prototyping and Circuit Design,PAL2010. NSC 98-2221-E-019-022.
Chu Yu, Chih-Jhen Chen, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen (2010, Aug). A Memoryless Viterbi Decoder for OFDM Systems. The 2010 VLSI Design/CAD Symposium.
Jen-Yang Chen, Chuan-Hsi Liu, Chang-Wei Fan, Haw-Yun Shin, and Mao-Hsu Yen (2010, Jul). An Adaptive PID Controller. Machine Learning and Cybernetics (ICMLC), 2010 International Conference on, Qingdao, Shandong, China.
S. J. Chen, P. A. Hsiung, C. Yu, M. H. Yen, S. Sezer, M. Schulte, and Y. H. Hu (2010, Jul). ARAL-CR: An Adaptive Reasoning And Learning Cognitive Radio Platform. International Symposium on Systems: Architectures, Modeling, and Simulation (SAMOS).
Yeong-Chang Maa, Mao-Hsu Yen, Chun-Hung Wang, Guan-Luen Lee, Xumin Guo (2010, Jul). Improving Power Saving for Filter-Based Branch Target Buffer. 2010 Cross-Strait Conference on Information Science and Technology, Qinhuangdao,China.
C. J. Chen, C. Yu, M. H. Yen, P. A. Hsiung, and S. J. Chen (2010, Jun). Perfect Shuffling for Cycle Efficient Puncturer and Interleaver for Software Defined Radio. Circuits and Systems (ISCAS), Proceedings of 2010 IEEE.
Chih-Jhen Chen, Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen (2010, Jun). Design of a Low Power Viterbi Decoder for Wireless Communication Applications. The 2010 IEEE Int’l Symposium on Consumer Electronics.
M. H. Yen, B. K. Zhan, Y. S. Chen, and J. L. Hou (2009, Oct). A Rearrangeable Binary Tree Switching Network for FPGA Routing Architecture. 2009 Conference on Innovative Applications of System Prototyping and Circuit Design. NSC 97-2220-E-002-019.
M. H. Yen, C. Y. Hsu, W. H. Chen, and Z. C. Wu (2009, Oct). An Improved Dynamic Space Warping Algorithm for 2D Image Recognition. 2009Conference on Innovative Applications of System Prototyping and Circuit Design. NSC 96-2220-E-002-032.
Chu Yu, Cheng-Hang Sung, Meng-Hsueh Chiang, Mao-Hsu Yen, and Hwai-Tsu Hu (2009, Aug). Low-Error Fixed-Width Modified Booth Multipliers. the 2009 VLSI Design/CAD Symposium.
J. C. Lin, C. Yu, M. H. Yen, P. A. Hsiung, S. J. Chen, and Y. H. Hu (2009, Jul). Parallel Implementation of Convolution Encoder for Software Defined Radio on DSP Architecture. International Symposium on Systems, Architectures, Modeling, and Simulation(SAMOS).
J. W. Lin, D. T. Yen, W. Y. Hu, C. Yu, M. H. Yen, P. A. Hsiung, and S. J. Chen (2009, Mar). A 900 MHz to 5.2 GHz Dual-Loop Feedback Multi-band LNA. International Symposium on Circuits and Systems (ISCAS). NSC 98-2220-E-002-007.
Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, Sao-Jie Chen (2009, Jan). Design of a High-Speed Block Interleaving/Deinterleaving Architecture for Wireless Communication Applications. The 2009 IEEE int'l Conference on Consumer Electronics.
Chun-Lung Wu, Chia-Yen Hsu, Yu-Hsiang Huang, Mao-Hsu Yen (2008, Oct). A VLSI Architecture for Computing the Dynamic Space Warping Algorithm. 2008 Conference on Innovative Applications of System Prototyping and Circuit Design, PAL 2008. NSC 95-2221-E-019-034.
Mao-Hsu Yen, Yeong-Chang Maa, Chu, Yu, Yi-Shan Chen (2008, Oct). SIMD-Wavefront Architecture for Computing the Dynamic Time Warping Algorithm. 2008 Conference on Innovative Applications of System Prototyping and Circuit Design, PAL 2008.. NSC 95-2221-E-019-034.
Chu Yu, Mao-Hsu Yen, Pao-Ann Hsiung, and Sao-Jie Chen (2008, Sep). A Unified Block Interleaving/Deinterleaving Architecture for Wireless Communication Applications. in Proc. The 2008 VLSI Design/CAD Symposium..
M. H. Yen, Yeong-Chang Maa, Yih-Hsia Lin, Shin-Yi Cheng, Chun-Lung Wu (2008, Aug). A DTW VLSI Chip for Computing the DSW Algorithm. Proc. of 2008 Conf. on VLSI Design and CAD, Ming Chuan College.
M. H. Yen, S. Y. Cheng, Y. H. Lin, H. Y. Shin (2006, Jul). FPGA with Rapid RTR for Embedded Systems. VLSI Design/CAD symposium. NSC 93-2215-E-130-001.
M. H. Yen, Y. C. Maa, C. F. Hsieh, S. C. Yi, (2006, Jul). A Three-Stage Three-Sided Rearrangeable Switching Network for Interconnection Chip. VLSI Design/CAD symposium. NSC 93-2215-E-130-001.
嚴茂旭 (2004, Aug). A Rearrangeable and Nonblocking Switching Network for FPIC. VLSI Design/CAD symposium. NSC 92-2218-E-130-003.
M. H. Yen, H. R. Liao, S. C. Yi and S. H. Huang (2004, --). Polygonal FPGA Design. Proc. of 2004 Conf. on VLSI Design and CAD, Ming Chuan College.
嚴茂旭 (2003, Aug). VLSI Implementation of Polygonal FPGA design. VLSI Design/CAD symposium. NSC 92-2218-E-130-003.
S.C. Yi, C. F. Hsieh, M. H. Yen (2003, Jun). Transmission Gates design for Low Power adders. International Conference on Informatics, Cybernetics, and Systems.
嚴茂旭 (2002). A Three-Sided Rearrangeable Switching Network for FPGA. VLSI Design/CAD symposium, Intelligent SOC Design.
嚴茂旭 (1999). Polygonal Routing Network for FPGA/FPIC. Proc. 1999 International Symposium on VLSI Technology, System, and Applications.
嚴茂旭 (1999). Symmetric and Programmable Multi-Chip Module for Rapid Prototyping System. Proc. 1999 IEEE Workshop on SiGNAL PROCESSING SYSTEMS.