Kwuang-Han Chang (IEEE Senior Member) received his B.S. and Ph. D. degrees in electrical engineering from the National Tsing-Hua University, Hsinchu, Taiwan, in 2011 and 2018, respectively
Dr. Chang specializes in
CMOS image sensors
Digital pixel sensors (architecture, analog/ADC, stacking chips design)
High-speed high resolution sensors (architecture, analog/ADC)
Mixed-signal IC design
High speed high resolution ADCs (SAR, multi-step, pipelined ADCs)
Column parallel and column shared ADCs (PWM, cyclic, sub-ranging ADCs)
Analog-to-digital conversion algorithm, methodology, and optimization
ADC architectural level and algorithm level design
Multi-bit/cycle (M-b/cycle), time interleaved (TI), sub-radix, and hybrid architecture
In 2018, he joined Brillnics Inc., Taiwan, as a Section Manager, where he contributed to CMOS image sensor readout circuits, column/pixel parallel analog-to-digital converters (ADCs) and digital pixel sensor (DPS) development.
His research interests include the analog-to-digital (A-to-D) conversion algorithm, methodology, and optimization, column/pixel parallel ADCs, high-speed high-resolution ADCs, and CMOS image sensors.
Contact: kh.chang.roger@gmail.com
Linkedin: https://www.linkedin.com/in/kwuang-han-chang-9a649143/
類比數位轉換演算法與設計方法最佳化暨高速高解析度連續漸進逼近式類比數位轉換器
Analog-to-Digital Conversion Algorithm, Methodology and Optimization, and High Speed High Resolution Successive Approximation Register Analog-to-Digital Convertors
Journal
[1] Kwuang-Han Chang, Tsung-Hsun Tsai, Yi-Hsuan Lin, Sheng-Yeh Lai, Hao-Ming Hsu, Hirofumi Abe, Kazuya Mori, Hideyuki Fukuhara, Chih-Hao Lin, Toshiyuki Isozaki, Wei-Chen Li, Wei-Fan Chou, Chien-Chun Lee, Wen-Han Tseng, Masayuki Uno, Rimon Ikeno, Masato Nagamatsu, Guang Yang, Shou-Gwo Wuu, Andrew Berkovich, Raffaele Capoccia, Song Chen, Zhao Wang, Chiao Liu, and Lyle Bainbridge, "A 400×400 3.24-μm 117-dB Dynamic Range Three-Layer Stacked Digital Pixel Sensor with Triple Quantization and Fixed Pattern Noise Correction," in IEEE Transaction on Electronic Devices (T-ED), early access.
[2] Uno Masayuki, Kwuang-Han Chang, Tsung-Hsun Tsai, Junichi Nakamura, Rimon Ikeno, Kazuya Mori, Ken Miyauchi, Toshiyuki Isozaki, Yi-Hsuan Lin, Sheng-Yeh Lai, Chih-Hao Lin,, Wei-Fan Chou, Guang Yang, Song Chen, and Chiao Liu, "Improvement in Random Noise for Pixel-Parallel Single-Slope ADC with Consideration of Flicker Noise Effect," in Sensors, vol. 25, no. 24, Dec., 2025.
[3] [Invited Journal] Kwuang-Han Chang and Chih-Cheng Hsieh, "A Calibration-Free 13-bit 10 MS/s Full-Analog SAR ADC with Continuous-Time Cascading Feedforward Op-Amps," in IEEE Journal of Solid-State Circuits (J-SSC), vol. 54, no. 10, pp. 2691-2702, Oct. 2019.
[4] Kwuang-Han Chang and Chih-Cheng Hsieh, "A Calibration-Free 12-bit 50 MS/s Full-Analog SAR ADC with Feedback Zero-Crossing Detectors," in IEEE Journal of Solid-State Circuits (J-SSC), vol. 54, no. 6, pp. 1624-1635, Jun. 2019.
[5] Ting-I Chou, Kwuang-Han Chang, Jia-Yin Jhang, Shih-Wen Chiu, Guoxing Wang, Chia-Hsiang Yang, Herming Chiueh, Hsin Chen, Chih-Cheng Hsieh, Meng-Fan Chang, and Kea-Tiong Tang, "A 1V 2.6mW Environmental Compensated Fully Integrated Nose-on-a-Chip", in IEEE Transaction on Circuits and Systems - II (TCAS-II), vol. 65, no. 10, pp. 1365-1369, Jul. 2018.
[6] Kwuang-Han Chang and Chih-Cheng Hsieh, "A 12 bit 150 MS/s Sub-Radix-3 SAR ADC with Switching Miller Capacitance Reduction," in IEEE Journal of Solid-State Circuits (J-SSC), vol. 53, no. 6, pp. 1755-1764, Jun. 2018.
[7] Kwuang-Han Chang and Chih-Cheng Hsieh, "A Hybrid Analog-to-Digital Conversion Algorithm with Sub-radix and Multiple Quantization Thresholds," in IEEE Transaction on Circuits and Systems – I (TCAS-I), vol. 64, no. 6, pp. 1400-1408, Jun. 2017.
[8] Yan-Jiun Chen, Kwuang-Han Chang, and Chih-Cheng Hsieh, "A 2.02–5.16 fJ/Conversion-step 10-Bit Hybrid Coarse-Fine SAR ADC With Time-domain Quantizer in 90-nm CMOS," in IEEE Journal of Solid-State Circuits (J-SSC), vol. 51, no. 2, pp. 357-364, Feb. 2016.
[9] [# Equal Contribution] #Shih-Wen Chiu, #Jen-Huo Wang, #Kwuang-Han Chang, #Ting-Hau Chang, #Chia-Min Wang, #Chia-Lin Chang, Chen-Ting Tang, Chien-Fu Chen, Chung-Hung Shih, Han-Wen Kuo, Li-Chun Wang, Hsin Chen, Chih-Cheng Hsieh, Meng-Fan Chang, Yi-Wen Liu, Tsan-Jieh Chen, Chia-Hsiang Yang, Herming Chiueh, Juyo-Min Shyu, Kea-Tong Tang, “A Fully Integrated Nose-on-a-Chip for Rapid Diagnosis of Ventilator-Associated Pneumonia,” in IEEE Transaction on Biomedical Circuits and Systems (TBioCAS), vol. 8, no. 6, pp. 765-778, Dec. 2014.
International Conference
[1] Tsung-Hsun Tsai, Kwuang-Han Chang, Andrew Berkovich, Raffaele Capoccia, Song Chen, Zhao Wang, Chiao Liu, Yi-Hsuan Lin, Sheng-Yeh Lai, Hao-Ming Hsu, Hirofumi Abe, Kazuya Mori, Hideyuki Fukuhara, Chih-Hao Lin, Toshiyuki Isozaki, Wei-Chen Li, Wei-Fan Chou, Masayuki Uno, Rimon Ikeno, Masato Nagamatsu, Guang Yang, Shou-Gwo Wuu, and Lyle Bainbridge, ”A 400×400 3.24μm 117dB-Dynamic-Range 3-Layer Stacked Digital Pixel Sensor”, in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2025.
[2] Kwuang-Han Chang, and Chih-Cheng Hsieh, “A Calibration-Free 0.7-V 13-bit 10-MS/s Full-Analog SAR ADC with Continuous-Time Feedforward Cascaded (CTFC) Op-Amps,” in IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2018.
[3] Kwuang-Han Chang, and Chih-Cheng Hsieh, “A 12 bit 150 MS/s 1.5 mW SAR ADC with Adaptive Radix DAC in 40 nm CMOS,” in IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2016.
[4] Ting-I Chou, Shih-Wen Chiu, Kwuang-Han Chang, Yi-Ju Chen, Chen-Ting Tang, Chung-Hung Shih, Chih-Cheng Hsieh, Meng-Fan Chang, Chia-Hsiang Yang, Herming Chiueh, and Kea-Tiong Tang, “Design of a 0.5V 1.68mW Nose-on-a-Chip for Rapid Screen of Chronic Obstructive Pulmonary Disease”, in IEEE Biomedical Circuits and System Conference (BioCAS), Oct. 2016.
[5] Kwuang-Han Chang, and Chih-Cheng Hsieh, “A 12b 10MS/s 18.9fJ/Conversion- step Sub-radix-2 SAR ADC,” in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Apr. 2016.
[6] Jin-Yi Lin, Kwuang-Han Chang, Chen-Che Kao, Shih-Chin Lo, Yan-Jiun Chen, Pei-Chen Lee, Chi-Hui Chen, Chin Yin, and Chih-Cheng Hsieh, “An 8-bit Column-Shared SAR ADC for CMOS image Sensor Applications,” in IEEE International Symp. on Circuits and Systems (ISCAS), May. 2015.
[7] Shih-Wen Chiu, Jen-Ho Wang, Kwuang-Han Chang, Hiang-Chiu Wu, Hsin Chen, Chih-Cheng Hsieh, Meng-Fan Chang, Guoxing Wang, Kea-Tiong Tang, “A signal acquisition and processing chip with built-in cluster for chemiresistive gas sensor array,” in IEEE International New Circuits and Sysytems Conference (NEWCAS), Jun. 2014.
[8] K-T. Tang, S-W. Chiu, C-H. Shih, C-L. Chang, C-M. Yang, D-J. Yao, J-H. Wang, C-M. Huang, H. Chen, K-H. Chang, C-C. Hsieh, T-H. Chang, M-F. Chang, C-M. Wang, Y-W. Liu, T-J. Chen, C-H. Yang, H. Chiueh, J-M. Shyu, "A 0.5V 1.27mW Nose-on-a-Chip for Rapid Diagnosis of Ventilator-Associated Pneumonia," in IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2014.
International Workshop
[1] Kwuang-Han Chang, Tsung-Hsun Tsai, Yi-Hsuan Lin, Sheng-Yeh Lai, Hao-Ming Hsu, Hirofumi Abe, Kazuya Mori, Hideyuki Fukuhara, Chih-Hao Lin, Toshiyuki Isozaki, Wei-Chen Li, Wei-Fan Chou, Chien-Chun Lee, Wen-Han Tseng, Wun-Young Leo, Masayuki Uno, Rimon Ikeno, Masato Nagamatsu, Guang Yang, Shou-Gwo Wuu, Andrew Berkovich, Raffaele Capoccia, Song Chen, Zhao Wang, Chiao Liu, and Lyle Bainbridge, "A 400 × 400 3.24μm 117dB Dynamic Range 3-Layer Stacked Digital Pixel Sensor with Triple Quantization and Fixed Pattern Noise Correction", in International Image Sensor Workshop (IISW), Jun. 2025.
[2] Tsung-Hsun Tsai, Raffaele Capoccia, Kwuang-Han Chang, Hao-Ming Hsu, Yi-Hsuan Lin, and Chien-Chun Lee, "Digital Pixel Sensor using Frame Averaging Unit for Fixed-Pattern Noise Correction and Pixel Size Reduction", in International Image Sensor Workshop (IISW), Jun. 2025.
[3] Masayuki Uno, Kwuang-Han Chang, Tsung-Hsun Tsai, Toshiyuki Isozaki, Rimon Ikeno, Kazuya Mori, Ken Miyauchi, Yi-Hsuan Lin, Sheng-Yeh Lai, Chih-Hao Lin, Wei-Fan Chou, Junichi Nakamura, Guang Yang, Song Chen, and Chiao Liu, "Random Noise Improvement for Pixel-Parallel Single-Slope ADC", in International Image Sensor Workshop (IISW), Jun. 2025.
Domestic Conference in Taiwan
[1] [Best Paper] Kwuang-Han Chang, and Chih-Cheng Hsieh, “A 5.3fJ/conv.-step 12b 50MS/s Full-Analog SAR ADC in 40nm CMOS,” in VLSI Design/CAD Symposium, Aug. 2017.
[2] [Best Paper] Kwuang-Han Chang, and Chih-Cheng Hsieh, “A 12b 150MS/s 1.5mW SAR ADC with Adaptive Radix in 40nm CMOS,” in VLSI Design/CAD Symposium, Aug. 2016.
[1] 2020 Taiwan IC Design Society (TICD): Outstanding PhD Dissertation Award
[2] 2016 - 2018 NOVATEK Fellowship
[3] 17th MXIC Golden Silicon Awards: Bronze Award
[4] 15th MXIC Golden Silicon Awards: Winning Prize
[5] 13th MXIC Golden Silicon Awards: Bronze Award
[6] 2012 National Tsing Hua University President Scholarship
[7] 2011 National Tsing Hua University Electrical Engineering Student Scholarship
PCT patents:
[1] Kwuang-Han Chang, Memory Array including Repeater Buffer, WI2023091093A1, May, 2023.
Taiwan (R.O.C) patents:
[1] 張光漢, 具有中繼緩衝器的記憶體陣列, TW1852176B, Aug., 2024.
[2] 張光漢, 管線式類比數位轉換器, TWI875462B, Mar., 2025.
Japan patents:
[1] 阿部直行, 張光漢, 真田慎吾, 固体撮像装置、固体撮像装置の駆動方法、および電子機器, JP7627550B2, Feb., 2025.