Schedule

10:00 – 11:00: Caratelli Alessandro (CERN) - "Digital design concepts for ASICs and programmable logic" (in English)

11:00 – 12:00: Caratelli Alessandro (CERN)- "Digital systems design: from the idea to the silicon" (in English)

13:00 – 14:00:  Dumik Andrii  (ETH Zürich) - "Use cases of FPGAs and ASICs" (in Ukrainian) 

14:00 –  15:30: Practical Work  - "Introduction to XILINX VIVADO" (mentor: Hrechykha Oleksii)

11:00 – 12:00: Dumik Andrii (ETH Zürich) - "Vérification, simulation and test benches" (in Ukrainian)

12:00 – 13:00: Plyushchay Alexander (KAU) - "Digital devices under the hood" (in Ukrainian)

13:00 – 14:30: Practical Work  - "Verification and testbench with XILINX VIVADO" (mentor : Varvarin Mykhailo)