Job Roles
Assistant Professor, Silicon University, Bhubaneswar, India (Sept.2024-till date)
Project Research Assistant, SMDP C2S @ NIT Rourkela, India (Oct.,2023- May,2024)
Ph.D. Senior Research Scholar, VLSI Research Group, NIT Rourkela (2018-2024)
(https://sites.google.com/view/profkkm/people_1)
Visiting Research Scholar- Kalyani Govt. Engineering College
Project Research Assistant, SMDP C2S@MeitY (10 months)
Lecturer, School of Elecronics Engineering, KIIT Deemed to be University (on Study Leave) 2015-2022
Projects:
1) Co-PI for SMDP C2S Tool Support Program, MeitY, Govt. of India
Positions/Responsibility:
1) Faculty (additional appointment) at Advanced VLSI Lab, Silicon University
2) Co-ordinator of Entrepreneurship Development Cell (ED Cell) and Institute Innovation Council, Silicon University
3) Speicial Trainer for VLSI at Industry Interface Cell, Silicon University
4) Teaching Assistant for VLSI and Embedded System Labs at NIT Rourkela
5) Member of VLSI Research Committee at KIIT University
6) Member of the Academic Accreditation Group and Hostel Supervision Committee at Silicon University asnd KIIT University
CONTACT DETAILS:
Email: joychowdhury87@yahoo.in
Publication Details: https://www.researchgate.net/profile/Joy-Chowdhury-4/publications
Linked In :
VLSI Design and Embedded Systems
Nano-electronic device modeling and simulation (Tunnel FET, GAA,HEMT, JLFET, etc.)
Device-circuit Co-design (TCAD-SPICE)
Emerging Nano-Transistors, Memristors, Quantum devices
Bio-sensors, biomedical device development
Smart city and Smart electronics
Hardware security
Digital system Design and Verification
ASIC Design, RTL-GDSII
RTL to GDSII using Open Source Tools (Icarus Verilog, Yosys, OpenRoad, etc.)
RTL to GDSII using Cadence Tool Suite and Synopsys Tool Chain
Digital System Design and Verification Using FPGA
Digital System Verification using System Verilog
RISC-V implementation in Verilog and FPGA
(https://github.com/silicon-vlsi/SI-2025-DigitalVLSI)
Industry Specific Academic Training in the Domain of Digital VLSI Design, Verification, Design for Testability, Design for Manufacturability, Testing.
ASIC SoC Design
Subjects Taught/Interests
Digital VLSI Design VLSI System Design
ASIC Design Digital System Design and Verification
Embedded Systems Real Time Systems
HDL based Digital Design Verification of Digital Systems
MOS device modeling Semiconductor Devices
Testing of VLSI circuit/ Design for Testability Low Power VLSI Design
Introduction to Python CAD for VLSI
Resource Person/Trainer for Third-Party Training/ FDP/VLSI Bootcamps
Available as a trainer for online/offline VLSI bootcamps, training program, FDP, TDP, summer training/internship.
VLSI Bootcamps completed- 2
FDP/TDP- 3
Workshops conducted- 3
Tutorials (IEEE sponsored)- 3