Resume

Education

[Fall 2022] - [Spring 2026]

[University of Central Florida] 

[B.S. Computer Engineering]

Study computer engineering at the University of Central Florida with a focus on VLSI design and Verification

[Fall 2024] - [Current]

[University of Central Florida] 

[Accelerated B.S. to M.S. Computer Engineering]

Accepted and currently taking graduate level course in while finishing undergraduate degree. 

Couse work: EEL 5722C - Field-Programmable Gate Array (FPGA) Design

Skills

[High-Level Synthesis & FPGA Prototyping]

• Used Vivado HLS to design a CNN accelerator, implementing loop unrolling, pipelining, and array partitioning techniques to optimize throughput and resource usage

• Familiar with resource/latency tradeoffs and hardware-software co-design strategies for FPGA deployment

[Verification & Hardware Description]

• SystemVerilog, Verilog, and UVM testbench structure familiarity. RTL design, functional simulation, and waveform debugging using Vivado Understanding of constrained-random testing, coverage-driven verification, and assertion-based design

[Embedded Systems and PCB design]

• Designed and soldered custom ultrasonic rangefinder PCB using Fusion 360
  Experience with through-hole and surface-mount soldering

• Designed and programmed microcontroller systems using C for UART, SPI, I²C, and ADC communication. Integrated sensors, displays, and peripheral interfaces on MSP430 microcontroller boards

[Programming Languages]

• Languages: Proficient in C, Java, Python, MIPS Assembly, Verilog, and SystemVerilog

Relevant Work

[Fall 2024] - [Current]

[Draco Lab] 

[Project Lead]

Conducting research on AI-driven FPGA hardware Trojans and LLM-assisted verification and detection methods 

[Spring 2024] - [Current]

[Addition Arena] 

[Operational Supervisor]

Supervised 20-person teams to build and manage large event setups efficiently. Coordinated workflow and task completion under tight deadlines