publications

Journals and Conferences.

[DAC] Synthesis of Resource-Efficient Superconducting Circuits with Clock-Free Alternating Logic. J. Volk ✧, P. Papanikolaou ✧, G. Zervakis, G. Tzimpragos. Proceedings of 61st Design Automation Conference. June 2024.

[Sci. Rep.] Addressable superconductor integrated circuit memory from delay lines. J. Volk, A. Wynn, E. Golden, T. Sherwood, G. Tzimpragos. 2023.

[IEEE TAS] Low-cost superconducting fan-out with cell Ic ranking. J. Volk, G. Tzimpragos, A. Wynn, E. Golden, T. Sherwood. 2023. [Best Student Paper Runner-Up at ASC]

[PLDI] PyLSE: a pulse-transfer level language for superconductor electronics. M. Christensen, G. Tzimpragos, H. Kringen,  J. Volk, T. Sherwood, B. Hardekopf. 2022.

[ISCA] Superconducting computing with alternating logic elements. G. Tzimpragos, J. Volk, A. Wynn, J. E. Smith, T. Sherwood. 2021. [Invited Oral Presentation at EUCAS] [IEEE Micro Top Picks Honorable Mention]

[IEEE Micro] Temporal computing with superconductors. G. Tzimpagos, J. Volk, D. Vasudevan, N. Tsiskaridze, G. Michelogiannakis, A. Madhavan, J. Shalf, T. Sherwood. 2021. [IEEE Micro Top Picks]

[ASPLOS] A computational temporal logic for superconducting accelerators. G. Tzimpragos, D. Vasudevan, N. Tsiskaridze, G. Michelogiannakis, A. Madhavan, J. Volk, J. Shalf, T. Sherwood. 2020.

[IEMCON] Number representation and arithmetic in the human brain. J. Volk, B. Parhami. 2020. [Best Presentation]

[NIM-A] Charge collection in irradiated HV-CMOS particle detectors. B. Hiti, et al.* 2019.

[IPTLEL] Aluminum Oxide Waveguides for Improved Transmission in the Visible and Near-Infrared Spectrum. J. J. Diaz Leon, D. M. Fryauf, J. Volk, N. P. Kobayashi. 2018.

[JINST] Radiation hardness studies of AMS HV-CMOS 350 nm prototype chip HVStripV1. K. Kanisauskas, et al.* 2017.

[JINST] Lessons learned in high frequency data transmission design: ATLAS strips bus tape. J. Dopke, et al.* 2017.

[NSS/MIC] The CHESS-2 prototype in AMS 0.35 μm process: A high voltage CMOS monolithic sensor for ATLAS upgrade. C. Tamma, et al.* 2016.

[NIM-A] Investigation of HV/HR-CMOS technology for the ATLAS phase-II strip tracker upgrade. V. Fadeyev, Z. Galloway, H. Grabas, A. A. Grillo, Z. Liang, F. Martinez-McKinney, A. Seiden, J. Volk, et al. 2016.

[NIM-A] Study of built-in amplifier performance on HV-CMOS sensor for the ATLAS phase-II strip tracker upgrade. Z. Liang, et al.* 2016.

[JINST] Charge collection studies in irradiated HV-CMOS particle detectors. A. Affolder, et al.* 2016.

[JINST] High speed data transmission on small gauge cables for the ATLAS Phase-II Pixel detector upgrade. J. Shahinian, J. Volk, V. Fadeyev, A. A. Grillo, B. Meimban, J. Nielsen, M. Wilder. 2016.

[JINST] Radiation hardness of two CMOS prototypes for the ATLAS HL-LHC upgrade project. B. T. Huffman, et al.* 2016.

✧ Co-first authors.

*Authors listed alphabetically.

Non-Archival conference talks and Abstracts.

[EUCAS] xeSFQ: clockless energy-efficient SFQ logic. J. Volk, G. Tzimpragos, O. Mukhanov. 2023.

[EUCAS] Pulsar: A Superconducting Delay-Line Memory. J. Volk, A. Wynn, E. Golden, T. Sherwood, G. Tzimpragos. 2023.

[ASC] Low-Cost Fan-Out with SFQ Cell Labeling. J. Volk, G. Tzimpragos, A. Wynn, E. Golden, T. Sherwood. 2022. [Best Student Paper Runner-Up]

[ASC] Architectural modeling and analysis of superconducting logic families. G. Tzimpragos, J. Volk, E. Golden, A. Wynn. 2022.

[ISCA] Circuit Abstractions for Low-Cost Fan-Out. J. Volk. Superconducting Digital Computing Architecture Research (SGAR). 2022.

[EUCAS] Design of an SFQ weighted threshold gate. J. Volk, G. Tzimpragos, A. Wynn, T. Sherwood. 2021.