A neuromorphic system, which mimics behaviors of a biological nervous system, has been considered as a promising candidate due to a more efficient computing capability compared to the conventional computer system based on the von Neumann architecture. Besides a higher data processing efficiency of the neuromorphic system, a low-power characteristics of a synaptic device, which is a fundamental building block, is essential for a high-level intelligence of the system. Here, it is known that a level of the intelligence is proportional to the number of synaptic devices, resulting in the increase of a total power consumption proportionally. In this respect, the power consumption of a single synaptic device has to be minimized. For reducing the power consumption of the device, the synaptic TFT (Syn-TFT) can be operated in a sub-threshold region due to a lower current level compared to an above-threshold region. In addition, for ultra-low power consumption, a synaptic pass-transistor (SPT) can be employed where the Syn-TFT is connected in series with a load TFT. Research papers associated with these devices are here.