Publications

Patent:

1.       T. Debnath, Inamul Hussain, P. K. Patowari, “Development of nano Electrical Discharge Machining (nEDM)”, Indian Patent (Patent No: 515083; Application no: 201931040317)

Journals:

1. 1. Inamul Hussain, Shaiak rafi Ahamed, "Design of A Novel Efficient Microwave Absorption Material (MAM) using Cu/g-CN/PVDF/CB Composite", IEEE Transactions on Dielectrics and Electrical Insulation (2025), Doi:10.1109/TDEI.2025.3579460, IF: 2.9 (Q1).

   2. Inamul Hussain, S. Chaudhury, “CNFET-based Energy-efficient 4:2 Compressor for Multiplier Applications”, Journal of Circuits, Systems and Computers, Vol. 34, No. 03, 2550067 (2025)  doi: 10.1142/S0218126625500677. IF- 0.9

   3.   Inamul Hussain, S. Yesmin, “Enhanced microwave absorption of g-C3N4/poly(vinylidene difluoride)/carbon black composites:, Materials Chemistry and Physics, Volume 309, 2023, 128337, ISSN 0254-0584, https://doi.org/10.1016/j.matchemphys.2023.128337.IF- 4.3 

   4.  Inamul Hussain, S. Chaudhury, “Fast and High Performing 1-Bit Full Adder Circuit Based on Input Switching Activity Patterns and Gate Diffusion Input Technique”, Circuits, Systems, and Signal Processing (CSSP), Springer, 40, 1762–1787 (2021 (2020), DOI: doi.org/10.1007/s00034-020-01550-3, IF- 1.8

   5. S. Yesmin, Inamul Hussain, R. Dasgupta, S. S. Dhar, “Two-dimensional tungsten oxide nanoflakes grafted over g-C3N4 as excellent electrode materials for hybrid supercapacitors”, Journal of Energy Storage, Volume 74, Part B, 2023, 109383, ISSN 2352-152X, https://doi.org/10.1016/j.est.2023.109383. IF- 8.9 

   6. S. Yesmin, Inamul Hussain, R. Dasgupta, S. S. Dhar. “Exploration of Nanocomposites as a Cost Effective High-Performance Asymmetric Supercapacitor Electrode Material”, IEEE Transaction on Nanotechnology, DOI. 10.1109/TNANO.2022.3194097, IF–2.1 

   7. S.Yesmin, M. Devi, Inamul Hussain, R. Dasgupta, S. S. Dhar, “In-situ grafting of Au and Cu nanoparticles over graphitic carbon nitride sheets and unveiling its superior supercapacitive performance as a hybrid composite electrode material”, Journal of Energy Storage, Volume 44, Part A, 2021, DOI: doi.org/10.1016/j.est.2021.103308. IF- 8.9 (

   8.  Inamul Hussain, S. Chaudhury, “A Comparative Study on the Effects of Technology Nodes and Logic Styles for Low Power High-Speed VLSI Applications”, International Journal of Nanoparticles, Inderscience Publishers, Vol. 12, No. 1/2, 2020, DOI: 10.1504/IJNP.2020.106004. 

   9.  Inamul Hussain, S. Chaudhury, “CNFET based Low Power Full Adder Circuit for VLSI Applications”, Nanoscience & Nanotechnology-Asia, Vol. 10, No. 3, pp. 286 – 291, 2020, DOI: 10.2174/2210681209666190220122553 

   10. Inamul Hussain, M. Kumar, “Design and Performance Analysis of a 3-2 Compressor By using Improved Architecture”, Journal of Active and Passive Electronic Devices, Vol. 12, No 3-4, 2017. (ESCI, Web of Science)

   11.  Inamul Hussain, M. Kumar, “A Fast and Reduced Complexity Wallace Tree Multiplier”, Journal of Active and Passive Electronic Devices, Vol. 12, no 1-2, pp. 63-71, 2017. (ESCI, Web of Science)

   12. Inamul Hussain, S. Chaudhury, "Design of energy-efficient multiplier based on 3: 2 compressor",IAES Institute of Advanced Engineering and Science, Vol. 10, No. 1, pp. 51-58, 2021, DOI: 10.11591/ijra.v10i.

Book Published:

1.   Inamul Hussain, S. Chaudhury, M. Kumar, “Low Power Wallace Multiplier: A Design Prspective”, Lambert Academic Publishing (LAP), vol-1, ISBN- 6200783411, 2020.

Book Chapters:

1.   Inamul Hussain and Saurabh Chaudhury, “Performance Comparison of 1 Bit Conventional and Hybrid Full Adder Circuits”, Advances in Communication, Devices and Networking, Vol. 462, 2018, Springer – Verlag Publishers. Singapore. DOI: doi.org/10.1007/978-981-10-7901-6_6 (Scopus Indexed, Web of Science)

2.   Inamul Hussain and Saurabh Chaudhury, “A new 4-2 compressor for VLSI Circuits and Systems”, Advances in Smart System Technologies. Advances in Intelligent Systems and Computing, vol 1163. Springer, Singapore. DOI: doi.org/10.1007/978-981-15-5029-4_33. (Scopus Indexed, Web of Science)

Conferences:

1.   S. Israq, P. Ghosh, Inamul Hussain, S. R. Ahamed, “A New 16T Full Adder Design for Full-Swing Outputs”, 21st IEEE INDICON 2024, IIT Kharagpur (Accepted)

2.   S. Israq, P. Ghosh, Inamul Hussain, S. R. Ahamed, “A 14T Low-Power High-Speed Full Adder Circuit”, 4th Emerging Electronics and Automation 2024, NIT Silchar (Accepted)

3.   R. Charan, Inamul Hussain, S. Yesmin, M. V. S. Reddy, “Review of Performance Analysis of Some Basic Full Adder Circuits” IEEE International Conference on Advanced and Global Engineering Challenges (AGEC) – 2023

4.   S. Yesmin, Inamul Hussain, R. Dasguta, S. S. Dhar, “Estimation of Relaxation Time using Electrochemical Impedance Spectroscopy of Graphitic Carbon Nitride-based Supercapacitor”, IEEE International Conference on Advanced and Global Engineering Challenges (AGEC) – 2023

5.   Inamul Hussain, A. Singh, S. Chaudhury, “A Review on The Effects of Technology on CMOS and CPL Logic Style On Performance, Speed And Power Dissipation”, in 2018 IEEE Electron Device Kolkata Conference (EDKCON 2018), November 24-25, 2018.

6.   Inamul Hussain, S. Chaudhury, “Performance comparison of 1bit conventional and hybrid full adder circuits”, in International Conference on Communication, Devices and Networking (ICCDN-2017), June 3-4, 2017.

7.   Inamul Hussain, C. K. Pandey, S. Chaudhury, “Design and Analysis of High-Performance Multiplier Circuit”, in 2019 Devices for Integrated Circuit (DevIC 2019), March 22-23, 2019.

8.   Inamul Hussain, S. Chaudhury, “A new 4-2 compressor for VLSI Circuits and Systems”, in International Conference on Frontiers in Smart System Technologies (FSST), April 3-5, 2019.

9. A. Singh, S. Chaudhury, Inamul Hussain, A. Ganguly and C. K. Sarkar, “A Multi Vt Approach for Silicon Nanotube FET with Halo Implantation for Improved DIBL”, in 2018 IEEE Electron Device Kolkata Conference (EDKCON 2018), November 24-25, 2018.