方偉騏教授於1978年取得國立交通大學電子工程學系學士學位，並於1982年與1992年分別從美國紐約州立大學石溪分校電子工程所和美國南加州大學電子工程研究所完成了碩士學位以及博士學位。在1985年至2009年，於美國國家航空暨太空總署噴射推進實驗室JPL擔任近24年資深工程師和經理，並獲得兩次美國太空總署太空技術躍進貢獻獎(NASA Space Act Award)以及13次的美國太空總署技術創新研發獎。

方偉騏教授在2003年獲選為國際電子電機學會院士(IEEE fellow)，已發表超過兩百篇論文，多項專利以及專書著作，並擔任多項國際重要期刊編輯和顧問，更為台灣爭取許多國際大型研討會在台灣舉辦(ICCE-TW)。

• 2007-迄今 國立陽明交通大學 講座教授

• 2008-2012 國立陽明交通大學 晶片系統研究中心主任

• 2007-2010 台灣積體電路製造 特聘講座教授

• 1985-2007 美國太空總署噴射推進實驗室 資深工程師/經理

• 1995.4-1995.11 德國航空太空中心 訪問科學家

• 1992-2002 美國南加州大學 兼任教授

• 1985 Ametek- Supercomputer           工程師

• 1984-1985 Terminal Data Cooperation                     工程師

• Vice President - Member Service, IEEE Systems Council（2008 - 2010）

• IEEE Fellow（2003）

• Governor IEEE Circuits and Systems Society (2004-2009)

• Member, Administration Committee of the IEEE Nanotechnology Council (2007-2008)

• Member, Administration Committee of the IEEE Systems Council (2005-2006)

• Chairman of Transnational and Liaison Committee, IEEE Systems Council (2005-2008)

• Chairman, IEEE CASS Nanoelectronics & Gigascale Systems Technical Committee (2005-2007)

• Advisor, Advisory Board of IEEE Systems Journal (2006-DATE)

• General Chair, 2006 IEEE International Conference on Intelligent Information Hiding and Multimedia Signal Processing, Pasadena, CA, USA, Dec. 18-20, 2006

• Publicity Chair,IEEE International Symposium on Circuits and Systems, Taiwan, May 2009

• IEEE Circuits and Systems Society, Certificate of Appreciation for Contributions to the 2006 IEEE CASS Technical Activities 

• IEEE Computer Society, Certificate of Appreciation for Contributions as the Tutorials Chair of the 1995 & 1996 International Conference on Computer Design

• IEEE Certificate of Appreciation for Valued Services and Contributions for the 1994 IEEE International ASIC Conference and Exhibit

• NASA 2003 Space Act Award for New Space Mission Technology “VLSI Processor Design of Real-Time Data Compression for High Resolution Imaging Radar.” Feb. 28, 2003. (1st  VLSI Data Compressor used in Space Mission)

• NASA 2002 Space Act Award for New Space Mission Technology “A Multichip Module with  RISC Processor with  Programmable Hardware.”, July 17, 2002.  (1st Integrated Computer-on-MCM used in Space Mission)

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “A Low-Power Smart Vision System-On-A-Chip Design for Ultra-Fast Machine Vision Applications,” Oct. 1. 1998.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “VIGILANTE: Ultra-Fast Smart Sensor for Target Recognition and Precision Tracking in a Simulated CMD Scenario,” July 1, 1998.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “High-Precision CDMA Detection with Array Processing Elements,” Feb. 6, 1998.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “VLSI Neural Processor based on Optimization Neural Network.”

• NASA Space Science Program’s Certificate of Recognition for the Contribution as a Member of the Radar Team for the Cassini Project, Sept. 1997.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “VLSI Block Adaptive Quantizer for Real Time Data Compression of Remote Sensing/Imaging Radar,” Sep. 19, 1996.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “A Multichip Module with RISC Processor with Programmable Hardware,” Aug. 28, 1996.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “Data Compression and VLSI Implementation,” March 21, 1995.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “Image and Video Compression with VLSI Neural Networks,” May 26, 1995.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “VLSI Focal-Plane Array Processor for Morphological Image Processing,” July 9, 1993.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “Data Compression for Onboard SAR Processor, April 30, 1992.

• NASA Certificate of Recognition for the disclosure of an inventive contribution entitled “Pipeline Synthetic Aperture Radar Data Compression Utilizing Systolic Binary Tree-Searched Architecture for Vector Quantization,” July 18, 1991.

• NASA Certificate of Recognition for the creative development of a technical innovation entitled “VLSI Universal Noiseless Coder,” Aug. 25, 1989