The ambition of this project is to develop novel design methods for More-than-Moore ICs (i.e. micro-nanoelectronics-centered, and including heterogeneous components such as analog/RF circuits and multi-physics sensors and actuators). Such ICs are the root technologies for nanoscale sensor nodes and the next big waves of Internet of Things (IoT) in many sectors (healthcare, transport, security, etc.), but present huge design challenges and increasingly slow time-to-market cycles, as well as severe sub-optimality. New design approaches are mandatory to enhance current "state of the art" design environments (such as schematic and SPICE-like simulators), which scale badly and which will hamper the full deployment of MtM technology for efficient sensor nodes and IoT.
To solve this, we propose a novel analog and heterogeneous system design flow based on industrially focused research targeting design space extraction, design automation, and behavioral heterogeneous system verification. The principal objectives will be:
to build a comprehensive hierarchical modeling approach and design flow over several levels that enforces reuse, allows architectural exploration and system-level verification, supported by an industry-accepted modeling language.
to extend a graph-based design approach in a more generic way to address multi-physics components, and use them for the fast generation of predictive models for heterogeneous components.
to extend the interpolation of Pareto-front solutions in model generation to predict both performance indicators and sizing parameters for multiphysics components and continuous-discrete systems over many levels of hierarchy.
to build a hierarchy of data-assisted performance models for a sensor hub system and to use the models to demonstrate the power of the approach both in terms of design efficiency and in terms of final performance improvement over manual design.
The success of the project will be measured by the speed of design of the sensor hub demonstrator, and the capability of exploring the impact of system-level tradeoffs on device-level constraints and vice versa. It is stressed that the project will not seek to develop a novel sensor hub architecture design, although this is a possible outcome. The objective of the project is to focus on improving the design process itself to enable faster product time to market and optimized product performance operating at the edge of the performance envelope.
The main outcome of the project will be a structured and systematic design method for heterogeneous components, encapsulated in a set of tools and models. We expect the project to lead to the following improvements: