S-H-A-DeS
Secured Hardware and Automotive design
The promises of modern day cyber physical systems (CPS) can only be achieved if security measures are adopted right from the design inception. Automotive systems are examples of complex cyber physical systems with several processing cores having interactions with physical dynamics. However, such systems can be targeted by various forms of attacks ranging from spurious modifications to the sensitive control data, spoofing of anti-lock braking sensor data to various forms of attacks on the underlying bus protocols connecting the ECUs. Usage of cryptography to secure these communications are a good starting point, but often attack surfaces exist because of bad implementations on hardware and embedded devices. These attack surfaces, namely side channel analysis, has been shown to be a powerful attack vector which can threaten the crypto-engines attempting to secure the CPS. Moreover, the electronic components engaged in such a complex CPS are often fabricated in foreign units, and often raise concerns about their trust. The current endeavour is aimed at developing research infrastructure in the area of hardware forensics for COTS used for CPS. The laboratory would be developing test-beds for connected automotive systems, attack and evaluation tools unfurling new attack surfaces, identifying light-weight countermeasures. In particular, we plan to develop imaging based tools for inspecting the circuits and components to sanitise from potential hardware Trojans.
In a related note, model based analysis and security verification of such CPS along with synthesis of safe and intelligent control remains an important research proposition. Addressing such challenges require synergistic methods developed with artefact borrowed from foundational aspects of Cryptography, Formal methods, Artificial Intelligence, Real time scheduling and Control theory. How this may be achieved and validated using hardware-in-loop testbeds and automotive software development tools remains another important goal of this laboratory. This initiative has been developed through collaboration of Secured Embedded Architecture Laboratory (https://cse.iitkgp.ac.in/resgrp/seal/) and High Performance Real-time Computing Laboratory (http://cse.iitkgp.ac.in/resgrp/hiprc/). The work will be also having close ties with the i-Hub: NTIHAC Foundation at IIT Kanpur, along with several reputed international research groups.