An automatic assertion generation tool

GoldMine Technology

1. Shobha Vasudevan, David Sheridan, Sanjay J. Patel, David Tcheng, William Tuohy, Daniel R. Johnson: GoldMine: Automatic assertion generation using data mining and static analysis. DATE 2010: 626-629.
2. Lingyi Liu, David Sheridan, Viraj Athavale, Shobha Vasudevan: Automatic generation of assertions from system level design using data mining. MEMOCODE 2011: 191-200.
3. Lingyi Liu, Chen-Hsuan Lin, Shobha Vasudevan: Word level feature discovery to enhance quality of assertion mining. ICCAD 2012: 210-217.
4. Lingyi Liu, Xuanyu Zhong, Xiaotao Chen, Shobha Vasudevan: Diagnosing root causes of system level performance violations. ICCAD 2013: 295-302.
5. Chen-Hsuan Lin, Lingyi Liu, Shobha Vasudevan: Generating concise assertions with complete coverage. ACM Great Lakes Symposium on VLSI 2013: 185-190.
6. Samuel Hertz, David Sheridan, Shobha Vasudevan: Mining Hardware Assertions With Guidance From Static Analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 32(6): 952-965 (2013).
7. Lingyi Liu, Shobha Vasudevan: Automatic Generation of System Level Assertions from Transaction Level Models. J. Electronic Testing 29(5): 669-684 (2013)
8. David Sheridan, Lingyi Liu, Hyungsul Kim, Shobha Vasudevan: A Coverage Guided Mining Approach for Automatic Generation of Succinct Assertions. VLSI Design 2014: 68-73 (Best paper awardee).
9. Viraj Athavale, Sai Ma, Samuel Hertz, Shobha Vasudevan: Code Coverage of Assertions Using RTL Source Code Analysis. DAC 2014: 61:1-61:6 (Best paper awardee).
10. Samuel Hertz, Debjit Pal, Spencer Offenberger, Shobha Vasudevan, A Figure of Merit for Assertions in Verification, Accepted in 24th Asia and South Pacific Design Automation Conference, ASPDAC 2019, Tokyo, Japan, January 21-24, 2019 (Best paper nominee).
11. Debjit Pal, Spencer Offenberger, Shobha Vasudevan: Assertion Ranking using RTL Source Code Analysis, Accepted in IEEE Trans. on CAD of INtegrated Circuits and Systems (2020).