Experience
Tempe, AZ, USA
2018 - Present
Graduate Research Assistant, Arizona State University.
My primary research focus is on the design of mixed-signal artificial neurons (ANs) and the design of feasible DRAM-based processing in memory (PIM) architectures for data and compute-intensive workloads.
Boise, ID, USA
Summer, 2022
Intern DRAM Product Engineer, Micron Technology Inc.
A Comprehensive review of industry-developed and fabricated processing in memory (PIM) prototypes.
Identified challenges for the wide adoption of the PIM in commercial architectures.
Performed a detailed cost-benefit analysis of the HBM-based PIM architectures.
Proposed an HBM-based PIM architecture adhering to the memory area and timing constraints.
San Jose, CA, USA
Summer, 2020
Hardware Engineering Intern, Qualcomm Technologies Inc.
Developed tools to automate the integration of RTL submodules to top-level design.
RTL design of a module to support software debugging of a functional block.
Carlsbad, CA, USA
Fall, 2019
SoC Tech Intern, MaxLinear Inc.
Developed tools and infrastructure to automate the collection of important data metrics of Standard Cell Libraries of TSMC and UMC.
Performed detailed analysis and comparison of TSMC 16nm and TSMC 5nm nodes using Standard Cell libraries.
Developed tools to collect and analyze data of important metrics of Physical Design on TSMC and UMC 16nm, 14nm, and 5nm technology nodes.
Hamirpur, HP, IN
2017 - 2018
Project Associate, National Institute of Technology (NIT)
Full Custom Memory Design of 256x32 bit SRAM tile.
Completed schematic design, custom layout, and characterization of SRAM.
Ropar, PB, IN
Summer, 2016
Research Intern, Indian Institute of Technology (IIT)
Designed DESTELLO: Simple RISC processor simulator and debugger.
Used JAVA and Eclipse platform to build a GUI based simulator and debugger https://github.com/drneerajgoel/destello.
Technical Skills:
Programming: VERILOG, C, Python, bash, tcl.
VLSI Tools: Cadence (Virtuoso, Genus, Innovus, Liberate MX), Synopsys (Custom Complier, HSPICE, Synphony HLS, Primetime), Mentor Graphics (Calibre), Xilinx Vivado.
Computer Architecture Simulators: GEM5, Ramulator (DRAM), McPAT (Power/Energy), HotSpot (Thermal).